71M6541D Datasheet, PDF (117/166 Pages) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

71M6541D/F/G and 71M6542F/G Data Sheet
Name
LCD_MAP[55:48]
LCD_MAP[47:40]
LCD_MAP[39:32]
LCD_MAP[31:24]
LCD_MAP[23:16]
LCD_MAP[15:8]
LCD_MAP[7:0]
LCD_MODE[2:0]
LCD_ON
LCD_BLANK
LCD_ONLY
LCD_RST
LCD_SEG0[5:0]
to
LCD_SEG15[5:0]
LCD_SEGDIO16[5:0]
to
LCD_SEGDIO45[5:0]
LCD_SEG46[5:0]
to
LCD_SEG50[5:0]
LCD_SEGDIO51[5:0]
to
LCD_SEGDIO55[5:0]
Location
2405[7:0]
2406[7:0]
2407[7:0]
2408[7:0]
2409[7:0]
240A[7:0]
240B[7:0]
2400[6:4]
240C[0]
240C[1]
28B2[6]
240C[2]
Rst Wk Dir Description
0 – R/W _{Enables LCD segment driver mode of combined SEGDIO pins. Pins that}
0 – R/W _{cannot be configured as outputs (SEG48 through SEG50) become inputs with}
0 – R/W internal pull ups when their LCD_MAP bit is zero. Also, note that SEG48
0 – R/W through SEG50 are multiplexed with the in-circuit emulator signals. When the
0 – R/W ^{ICE_E pin is high, the ICE interface is enabled, and SEG48 through SEG50}
0 – R/W ^{become E_RXTX, E_TCLK and E_RST, respectively.}
0 – R/W
Selects the LCD bias and multiplex mode.
LCD_MODE
0 – R/W
000
001
010
011
Output
4 states, 1/3 bias
3 states, 1/3 bias
2 states, ½ bias
3 states, ½ bias
LCD_MODE
100
101
110
Output
Static display
5 states, 1/3 bias
6 states, 1/3 bias
0 – R/W Turns on or off all LCD segments without changing LCD data. If both bits are
0 – R/W set, the LCD display is turned on.
00
Puts the IC to sleep, but with LCD display still active. Ignored if system power
W is present. It awakens when Wake Timer times out, when certain DIO pins
are raised, or when system power returns. See 3.2 Battery Modes.
0
–
R/W
Clear all bits of LCD data. These bits affect SEGDIO pins that are configured
as LCD drivers. This bit does not auto clear.
2410[5:0] to
241F[5:0]
0
–
R/W
SEG Data for SEG0 through SEG15. DIO data for these pins is in SFR
space.
2420[5:0] to
243D[5:0]
SEG and DIO data for SEGDIO16 through SEGDIO45. If configured as DIO,
0 – R/W bit 1 is direction (1 is output, 0 is input), bit 0 is data, and the other bits are
ignored.
243E[5:0] to 2442[5:0]
0
–
R/W
SEG data for SEG46 through SEG50. These pins cannot be configured as
DIO.
SEG and DIO data for SEGDIO51 through SEGDIO55. If configured as DIO,
2443[5:0] to 2447[5:0]
0
–
R/W
bit 1 is direction (1 is output, 0 is input), bit 0 is data, and the other bits are
ignored.
SEGDIO52 through SEDIO54 are available only on the 71M6542F/G.