71M6541D Datasheet, PDF (119/166 Pages) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

Name
MUX_DIV[3:0]
OPT_BB
OPT_FDC[1:0]
OPT_RXDIS
OPT_RXINV
OPT_TXE [1:0]
OPT_TXINV
OPT_TXMOD
OSC_COMP
PB_STATE
PERR_RD
PERR_WR
PLL_OK
Location
2100[7:4]
2457[0]
2457[5:4]
2457[2]
2457[1]
2456[3:2]
2456[0]
2456[1]
28A0[5]
SFR F8[0]
SFR FC[6]
SFR FC[5]
SFR F9[4]
71M6541D/F/G and 71M6542F/G Data Sheet
Rst Wk Dir Description
0
0
R/W
MUX_DIV[3:0] is the number of ADC time slots in each MUX frame.
maximum number of time slots is 11.
The
Configures the input of the optical port to be a DIO pin to allow it to be
bit-banged. In this case, DIO5 becomes a third high speed UART. Refer to
0 – R/W _{2.5.7 UART and Optical Interface under the “Bit Banged Optical UART}
(Third UART)” sub-heading on page 58.
0–
0–
0–
00 –
0–
0–
0–
00
00
00
Selects OPT_TX modulation duty cycle.
OPT_FDC Function
R/W
00
50% Low
01
25% Low
10
12.5% Low
11
6.25% Low
OPT_RX can be configured as an input to the optical UART or as SEGDIO55.
OPT_RXDIS = 0 and LCD_MAP[55] = 0: OPT_RX
R/W OPT_RXDIS = 1 and LCD_MAP[55] = 0: DIO55
OPT_RXDIS = 0 and LCD_MAP[55] = 1: SEG55
OPT_RXDIS = 1 and LCD_MAP[55] = 1: SEG55
R/W
Inverts result from OPT_RX comparator when 1. Affects only the UART input.
Has no effect when OPT_RX is used as a DIO input.
Configures the OPT_TX output pin.
If LCD_MAP[51] = 0:
R/W
00 = DIO51, 01 = OPT_TX, 10 = WPULSE, 11 = VARPULSE
If LCD_MAP[51] = 1:
xx = SEG51
R/W Invert OPT_TX when 1. This inversion occurs before modulation.
Enables modulation of OPT_TX. When OPT_TXMOD is set, OPT_TX is
R/W modulated when it would otherwise have been zero. The modulation is applied
after any inversion caused by OPT_TXINV.
R/W
Enables the automatic update of RTC_P and RTC_Q every time the temperature
is measured.
R The de-bounced state of the PB pin.
The IC sets these bits to indicate that a parity error on the remote sensor has
R/W been detected. Once set, the bits are remembered until they are cleared by
the MPU.
R Indicates that the clock generation PLL is settled.