MAX1329 Datasheet, PDF (47/78 Pages) Maxim Integrated Products – 12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs, Reference, Voltage Monitors, and Temp Sensor

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
ADC GT Alarm Register
The ADC GT Alarm register contains the greater-than
mode, trip count, and threshold settings. A write to this
register address resets the trip counters to zero. The
GT alarm is functional for the normal, fast power-down,
and burst modes.
GTAM: ADC Greater-Than Alarm Mode bit (default = 0).
GTAM = 0 means that the alarm trips do not need to be
consecutive before the GTA Status bit is set. When
GTAM = 1, the alarm trips must be consecutive to set
the GTA Status bit.
GTAC<2:0>: ADC Greater-Than Alarm Trip Count bits
(default = 000). GTAC<2:0> set the number of conversion
results needed to be greater than the alarm threshold
before the GTA Status bit is set (see Table 13).
GTAT<11:0>: ADC Greater-Than Alarm Threshold bits
(default = 0xFFF). When the required number of conver-
sion results greater than the threshold set by the
GTAT<11:0> bits have been completed, the GTA Status
bit is set in the Status register. Clearing the GTA Status
bit by reading the Status register or writing to the ADC
GT Alarm register restarts the trip count. The
GTAT<11:0> bits are in binary format when the ADC is in
unipolar mode and two’s complement format when the
ADC is in bipolar mode. Disable the GT alarm by setting
GTAT<11:0> to 0xFFF when the ADC is in unipolar mode
and 0x7FF when the ADC is in bipolar mode.
NAME
DEFAULT
MSB
GTAM
0
NAME
DEFAULT
GTAT7
1
GTAC2
0
GTAT6
1
GTAC1
0
GTAT5
1
GTAC0
0
GTAT11
1
GTAT10
1
GTAT9
1
GTAT4
1
GTAT3
1
GTAT2
1
GTAT1
1
GTAT8
1
LSB
GTAT0
1
Table 13a. ADC Greater-Than Alarm Trip
Count Bit Configuration
GTAC2
0
0
0
0
1
1
1
1
GTAC1
0
0
1
1
0
0
1
1
GTAC0
0
1
0
1
0
1
0
1
NUMBER OF TRIPS
1
2
3
4
5
6
7
8
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