MAX1329 Datasheet, PDF (29/78 Pages) Maxim Integrated Products – 12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs, Reference, Voltage Monitors, and Temp Sensor

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
V_REFADC/GAIN
FULL-SCALE TRANSITION
V_REFADC
1 LSB = _{(GAIN x 4096)}
0111 1111 1111
0111 1111 1110
0111 1111 1101
V_REFADC
(2 x GAIN)
0000 0000 0001
0000 0000 0000
1111 1111 1111
1 LSB =
V_REFADC
(GAIN x 4096)
V_REFADC
(2 x GAIN)
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
0123
INPUT VOLTAGE (LSB)
4093 4095
1000 0000 0010
1000 0000 0001
1000 0000 0000
-2048
-2046
-1 0 +1
INPUT VOLTAGE (LSB)
+2045 +2047
Figure 5. Unipolar Transfer Function
Figure 6. Bipolar Transfer Function
accumulator is functional for the normal, fast power-
down, and burst modes, but cannot be used for
temperature-sensor conversions.
The 20-bit binary accumulator provides up to 256 times
oversampling and binary digital filtering. The digital filter
has a sinc response and the notch locations are deter-
mined by the sampling rate and the oversampling ratio
(see the Applying a Digital Filter to ADC Data Using the
20-Bit Accumulator section). There is a digital-signal-
processing mode where dither is added to the over-
sampling to extend the resolution from 12 to 16 bits. In
this mode, a sample rate of 1220sps can be main-
tained. The oversampling rate (OSR) required to
achieve an increase in resolution is OSR = 2^2N, where
N is the additional bits of resolution. See the ADC
Accumulator Register section.
ADC Alarm Mode
The ADC Greater-Than (GT) and Less-Than (LT) Alarm
registers can be used to generate an interrupt once the
ADC result exceeds the alarm register value. The alarm
registers also control the number of alarm trips required
and whether or not they need to be consecutive to gen-
erate an interrupt. The GT and LT alarms are pro-
grammed through the ADC GT and LT Alarm registers.
The alarms are functional for the normal, fast power-
down, and burst modes.
ADC Transfer Functions
Figures 5 and 6 provide the ADC transfer functions for
unipolar and bipolar mode. The digital output code
format is binary for unipolar mode and two’s comple-
ment for bipolar mode. Calculate 1 LSB using the
following equation:
1 LSB = V_REFADC/(gain x 4096)
for both unipolar and bipolar modes,
where V_REFADC is the reference voltage at REFADC
and gain is the PGA gain. In unipolar mode, the output
code ranges from 0 to 4095 for inputs from zero to full-
scale. In bipolar mode, the output code ranges from
-2048 to +2047 for inputs from negative full-scale to
positive full-scale.
Digital-to-Analog Converter (DAC)
The MAX1329 includes two 12-bit DACs (DACA and
DACB) and the MAX1330 includes one 12-bit DAC
(DACA). The DACs feature force-sense outputs and
DACA includes a 16-word FIFO. Each DAC is double-
buffered with an input and output register (see Figure 7).
The DACA(B)PD<1:0> bits in the DAC Control register
control the power and write modes for DACA and DACB.
With the DAC(s) powered-up, the three possible com-
mands are a write to both the input and output registers,
a write to the input register only, or a shift of data from
the input register to the output register. With the DAC(s)
powered-down, only a simultaneous write to both input
and output registers is possible. DPIO_ can be
programmed to shift the input register data to the output
register for each DAC individually or simultaneously
(MAX1329 only). The value in the output register
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