MAX1329 Datasheet, PDF (24/78 Pages) Maxim Integrated Products – 12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs, Reference, Voltage Monitors, and Temp Sensor

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
Pin Description (continued)
PIN
MAX1329 MAX1330
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
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—
NAME
FUNCTION
OUTA DACA Force-Sense Output. Also internally connected to ADC mux.
FBA DACA Force-Sense Feedback Input. Also internally connected to ADC mux.
REFDAC
DAC Internal Reference Buffer Output/DAC External Reference Input. In internal reference
mode, REFDAC provides a 1.25V, 2.048V, or 2.5V internal reference buffer output. In
external DAC reference buffer mode, disable internal reference buffer. Bypass REFDAC to
AGND with a 1µF capacitor.
SNC2
SCM2
SNO2
Analog Switch 2 Normally-Closed Terminal
Analog Switch 2 Common Terminal
Analog Switch 2 Normally-Open Terminal
AIN2
AIN1
Analog Input 2. Also internally connected to ADC mux.
Analog Input 1. Also internally connected to ADC mux.
REFADC
REFADJ
AGND
ADC Internal Reference Buffer Output/ADC External Reference Input. In internal reference
mode, REFADC provides a 1.25V, 2.048V, or 2.5V internal reference buffer output. In
external ADC reference buffer mode, disable internal reference buffer. Bypass REFADC to
AGND with a 1µF capacitor.
Internal Reference Output/Reference Buffer Amplifiers Input. In internal reference mode,
bypass REFADJ to AGND with a 0.01µF capacitor. In external reference mode, disable
internal reference.
Analog Ground
AV_DD
Analog Supply Input. Bypass AV_DD to AGND with at least a 0.01µF capacitor. With the
charge pump enabled, see Table 32 for required capacitor values.
C1B
Charge-Pump Capacitor Input B. Connect C_FLY across C1A and C1B. See Table 32 for
required capacitor values.
C1A
Charge-Pump Capacitor Input A. Connect C_FLY across C1A and C1B. See Table 32 for
required capacitor values.
DV_DD
Digital Supply Input. Bypass DV_DD to DGND with at least a 0.01µF capacitor. When using
charge pump, see Table 32 for required capacitor values.
DGND Digital Ground
CLKIO
Clock Input/Output. In internal clock mode, enable CLKIO output for external use. In
external clock mode, apply a clock signal at CLKIO for the ADC and charge pump.
Exposed Pad. The exposed pad is located on the package bottom and is internally
EP connected to AGND. Connect EP to the analog ground plane. Do not route any PCB traces
under the package.
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