MAX1329 Datasheet, PDF (11/78 Pages) Maxim Integrated Products – 12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs, Reference, Voltage Monitors, and Temp Sensor

12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
TIMING CHARACTERISTICS (continued)
(DV_DD = 1.8V to 3.6V, AV_DD = 2.7V to 5.5V, T_A = T_MIN to T_MAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK to APIO3 Propagation
Delay
DIN to APIO2 Propagation Delay
APIO1 to DOUT Propagation
Delay
t_DSA
t_DDA
t_DAD
AP3MD<1:0> = 11, CS is high
AP2MD<1:0> = 11, CS is high
AP1MD<1:0> = 11, CS is high
30
ns
25
ns
20
ns
SPI-Mode Propagation Delay
Matching
t_DM
Among APIO4, APIO3, APIO2, and APIO1
±10
ns
ANALOG PROGRAMMABLE I/O TIMING PARAMETERS (APIO1–APIO4, DV_DD = 1.8V to 3.6V, AV_DD = 2.7V to 5.5V, C_L = 20pF)
SPI Write to APIO Output Valid
t_SD
From last SCLK rising edge
100
ns
APIO Rise/Fall Input to Interrupt
Asserted Delay
t_DI
Interrupt programmed on RST1 and/or
RST2, corresponding status bits unmasked
175
ns
CS to APIO4 Propagation Delay
t_DCA
AP4MD<1:0> = 11
60
ns
SCLK to APIO3 Propagation
Delay
DIN to APIO2 Propagation Delay
t_DSA
t_DDA
AP3MD<1:0> = 11, CS is high
AP2MD<1:0> = 11, CS is high
50
ns
50
ns
APIO1 to DOUT Propagation
Delay
t_DAD
AP1MD<1:0> = 11, CS is high
80
ns
SPI-Mode Propagation Delay
Matching
t_DM
Among APIO4, APIO3, APIO2, and APIO1
±30
ns
Note 1: ADC INL and DNL, offset, and gain are tested at DV_DD = 1.8V, AV_DD = 2.7V, f_SAMPLE = 234ksps to guarantee performance
at f_SAMPLE = 312ksps, DV_DD ≥ 2.7V and AV_DD ≥ 5.0V.
Note 2: Guaranteed by design. Not production tested.
Note 3: AV_DD supply current contribution for this module.
Note 4: DNL and INL are measured between code 115 and 4095.
Note 5: Temperature sensor accuracy is tested using a 2.5084V reference applied to REFADJ.
Note 6: The maximum trip levels for the AV_DD monitor are 5% below the typical charge-pump output value. The charge-pump output
voltage and the trip thresholds track to prevent tripping at -5% below the typical charge-pump output value.
Note 7: DV_DD supply current contribution for this module.
Note 8: The normal operation and sleep mode supply currents are measured with no load on DOUT, SCLK idle, and all digital inputs
at DGND or DV_DD. CLKIO runs in normal mode operation and idle in sleep mode.
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