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IS66WVC2M16ALL Datasheet, PDF (35/67 Pages) Integrated Silicon Solution, Inc – Mixed Mode supports asynchronous write and synchronous read operation
Timing Diagrams
Figure 18: Power-Up Initialization Timing
VDD, VDDQ=1.7V
tPU > 150us
Device Initialization
IS66WVC2M16ALL
VDD(MIN)
Device ready for
normal operation
Figure 19: DPD Entry and Exit Timing Parameters
tDPD
tDPDX
CE#
Write
RCR[4]=0
DPD Enabled
DPD Exit
tPU
Device Initialization Device ready for
normal operation
Figure 20: Asynchronous READ
Address
DQ0-
DQ15
tRC
VALID
ADDRESS
tAA
VALID
OUTPUT
ADV#
CE#
UB#/LB#
OE#
tCO
tLZ
tBA
tOLZ
tOE
tHZ
tBHZ
tOHZ
WE#
tCEW
HiZ
WAIT
tHZ
HiZ
Rev.A | June 2011
www.issi.com – SRAM@issi.com
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