ISL6329 Datasheet, PDF (8/38 Pages) Intersil Corporation – Dual PWM Controller Powering AMD SVI Split-Plane Processors

ISL6329
Table of Contents
Absolute Maximum Ratings.............................................................. 9
Thermal Information .......................................................................... 9
Recommended Operating Conditions ............................................. 9
Electrical Specifications ....................................................................9
Timing Diagram ................................................................................ 12
Operation ........................................................................................... 12
Multiphase Power Conversion .................................................. 12
Interleaving.................................................................................. 12
Active Pulse Positioning Modulated PWM Operation ........... 13
Adaptive Phase Alignment (APA)............................................. 13
PWM Operation........................................................................... 13
Continuous Current Sampling................................................... 14
Temperature Compensated Current Sensing......................... 15
Channel-Current Balance........................................................... 15
Serial VID Interface (SVI) ................................................................. 15
Pre-PWROK METAL VID ............................................................. 15
SVI Mode ...................................................................................... 16
Power Savings Mode: PSI_L...................................................... 17
Voltage Regulation ..................................................................... 18
Load-Line (Droop) Regulation ................................................... 18
Droop Control .............................................................................. 18
Output-Voltage Offset Programming ....................................... 19
Dynamic VID ................................................................................ 19
Advanced Adaptive Zero Shoot-Through Deadtime Control
(Patent Pending) .......................................................................... 19
Initialization....................................................................................... 20
Power-On Reset .......................................................................... 20
Enable Comparator .................................................................... 20
Phase Detection.......................................................................... 20
Soft-Start Output Voltage Targets ............................................ 20
Soft-Start...................................................................................... 20
Pre-Biased Soft-Start.................................................................. 21
Fault Monitoring and Protection..................................................... 21
Power Good Signal ..................................................................... 21
Overvoltage Protection .............................................................. 21
Pre-POR Overvoltage Protection............................................... 21
Undervoltage Detection............................................................. 22
Overcurrent Protection .............................................................. 22
Individual Channel Overcurrent Limiting ................................ 23
I²C Bus Interface .............................................................................. 23
Data Validity ................................................................................ 23
START and STOP Conditions..................................................... 23
Byte Format................................................................................. 24
Acknowledge............................................................................... 24
ISL6329 I²C Slave Address....................................................... 24
Communicating Over the I²C Bus ............................................ 24
Writing to the Internal Registers.............................................. 24
Reading from the Internal Registers ....................................... 25
Resetting the Internal Registers .............................................. 25
I²C Read and Write Protocol .................................................... 26
Register Bit Definitions.............................................................. 26
General Design Guide ...................................................................... 28
Power Stages .............................................................................. 28
Internal Bootstrap Device.......................................................... 29
Gate Drive Voltage Versatility ................................................... 29
Package Power Dissipation ...................................................... 29
Inductor DCR Current Sensing Component Fine Tuning ..... 30
Loadline Regulation Resistor ................................................... 31
Compensation With Loadline Regulation............................... 31
Compensation Without Loadline Regulation ......................... 32
Output Filter Design ................................................................... 32
Switching Frequency .................................................................. 33
Input Capacitor Selection.......................................................... 33
Layout Considerations ..................................................................... 34
Routing UGATE, LGATE, and PHASE Traces............................ 35
Current Sense Component Placement and Trace Routing ....... 35
Thermal Management ............................................................... 35
Revision History ................................................................................ 37
Products ............................................................................................. 37
Package Outline Drawing ............................................................... 38
8
FN7800.0
April 19, 2011