ISL6329 Datasheet, PDF (3/38 Pages) Intersil Corporation – Dual PWM Controller Powering AMD SVI Split-Plane Processors

ISL6329
Controller Block Diagram
FB_NB
COMP_NB
VSEN_NB
ISEN_NB+
ISEN_NB-
I2C_ADDR
SCL
SDA
VDDPWRGD
OFS
COMP
FB_PSI
FB
RGND
PWROK
VDDIO
SVC
SVD
VSEN
APA
OCP
TCOMP1
TCOMP2
ISEN1+
ISEN1-
ISEN2+
ISEN2-
ISEN3+
ISEN3-
ISEN4+
ISEN4-
ISEN5+
ISEN5-
ISEN6+
ISEN6-
CURRENT
SENSE
I²C
DAC_OFS
NB_OVP
CORE_OVP
VDDPWRGD_TRIP
GVOT_LDO
NUM_PHASES_PSI
NUM_CYCLES_PSI
OFFSET
RGND
NB_REF ∑
UV
LOGIC
OV
LOGIC
NB
FAULT
LOGIC
CH3_OFF
PSI
+
∑
RGND
+
SVI
SLAVE
BUS
E/A
NB_REF
APA
OV
LOGIC
UV
LOGIC
OC
DUAL
OCP
I_TRIP
8
N
SOFT-START
AND
FAULT LOGIC
LOAD APPLY
TRANSIENT
ENHANCEMENT
CLOCK AND
TRIANGLE WAVE
GENERATOR
∑
∑
∑
E/A
RAMP
MOSFET
DRIVER
EN_12V
ENABLE
LOGIC
LDO
POWER-ON
RESET
DROOP
CONTROL
MOSFET
DRIVER
PWM1
PWM2
PWM3
MOSFET
DRIVER
TEMPERATURE
COMPENSATION
CH1 CURRENT
SENSE
CH2 CURRENT
SENSE
CH3 CURRENT
SENSE
CH4 CURRENT
SENSE
CH5 CURRENT
SENSE
CH6 CURRENT
SENSE
ISEN2-
ISEN3-
ISEN4-
ISEN5-
ISEN6-
I_TC_IN
PWM4
∑
PWM5
∑
∑
I_AVG
CHANNEL
CURRENT
BALANCE
PWM6
1
N
I_TC_IN
1
8
∑
EN_12V
PH3/PH4/PH5/PH6
POR
CHANNEL
DETECT
ISEN2-
ISEN3-
ISEN4-
ISEN5-
ISEN6-
PWM3
SIGNAL
LOGIC
PWM4
SIGNAL
LOGIC
PWM5
SIGNAL
LOGIC
PWM6
SIGNAL
LOGIC
GND
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PVCC
EN
VCC
GVOT
BOOT1
UGATE1
PHASE1
LGATE1
DRPCTRL
FS
BOOT2
UGATE2
PHASE2
LGATE2
PWM3
PWM4
PWM5
PWM6
3
FN7800.0
April 19, 2011