X3100-01 Datasheet, PDF (3/41 Pages) Intersil Corporation – Cell Balancing Control

X3100, X3101
Pin Descriptions (Continued)
PIN
NUMBER PIN NAME
BRIEF DESCRIPTION
4
CB2 Cell balancing FET control output 2. These outputs are used to switch an external FETs in order to perform cell voltage
balancing control. This function can be used to adjust individual cell voltages (e.g. during cell charging). CB2 can be driven
high (Vcc) or low (Vss) to switch the external FET ON/OFF.
5
VCELL3 Battery cell 3 voltage. This pin is used to monitor the voltage of each battery cell internally. The
voltage of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells.
6
CB3 Cell balancing FET control output 3. This output is used to switch an external FET in order to
perform cell voltage balancing control. This function can be used to adjust an individual cell voltage (e.g. during cell charging).
CB3 can be driven high (Vcc) or low (Vss) to switch the external FET ON/OFF.
7
VCELL4/ Battery cell 4 voltage (X3100) Ground (X3101). This pin is used to monitor the voltage of this battery cell internally. The
VSS voltage of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells. For the X3101 device connect the VCELL4/VSS pin
to ground.
8
CB4 Cell balancing FET control output 4. This output is used to switch an external FET in order to
perform cell voltage balancing control. This function can be used to adjust individual cell voltages
(e.g. during cell charging). CB4 can be driven high (Vcc) or low (Vss) to switch the external FET ON/OFF.
When using the X3101, the CB4 pin can be left unconnected, or the FET control can be used for other purposes.
9
VSS Ground.
10
VCS1 Current sense voltage pin 1. A sense resistor (R_SENSE) is connected between VCS1 and VCS2 (Figure 1). R_SENSE has a
resistance in the order of 20mΩ to 100mΩ, and is used to monitor current flowing through the battery terminals, and protect
against over-current conditions. The voltage at each end of R_SENSE can also be monitored at pin AO.
11
VCS2 Current sense voltage pin 2. A sense resistor (R_SENSE) is connected between VCS1 and VCS2 (Figure 1). R_SENSE has a
resistance in the order of 20mΩ to 100mΩ, and is used to monitor current flowing through the battery terminals, and protect
against over-current conditions. The voltage at each end of R_SENSE can also be monitored at pin AO.
12
OVT Over-charge detect/release time input. This pin is used to control the delay time (T_OV) associated with the detection of an
over-charge condition (see section “Over-charge Protection” on page 14).
13
UVT Over-discharge detect/release time input. This pin is used to control the delay times associated with the detection (T_UV)
and release (T_UVR) of an over-discharge (under-voltage) condition (see section “Over-discharge Protection” on page 16).
14
OCT Over-current detect/release time input. This pin is used to control the delay times associated with the detection (T_OC) and
release (T_OCR) of an over-current condition (see section “Over-Current Protection” on page 19).
15
AO
Analog multiplexer output. The analog output pin is used to externally monitor various battery parameter voltages. The
voltages which can be monitored at AO (see section “Analog Multiplexer Selection” on page 21) are:
– Individual cell voltages
– Voltage across the current sense resistor (R_SENSE)^. This voltage is amplified with a gain set by the user in the control register
(see section “Current Monitor Function” on page 21.)
The analog select pins pins AS0 - AS2 select the desired voltage to be monitored on the AO pin.
16
AS0 Analog output select pin 0. These pins select which voltage is to be multiplexed to the output AO (see section “Sleep Control
(SLP)” on page 11 and section “Current Monitor Function” on page 21)
17
AS1 Analog output select pin 1. These pins select which voltage is to be multiplexed to the output AO (see section “Sleep Control
(SLP)” on page 11 and section “Current Monitor Function” on page 21)
18
AS2 Analog output select pin 2. These pins select which voltage is to be multiplexed to the output AO (see section “Sleep Control
(SLP)” on page 11 and section “Current Monitor Function” on page 21)
19
SI
Serial data input. SI is the serial data input pin. All opcodes, byte addresses, and data to be written to the device are input
on this pin.
20
SO
Serial data output. SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock. While CS is HIGH, SO will be in a High Impedance state.
Note: SI and SO may be tied together to form one line (SI/SO). In this case, all serial data communication with the X3100 or
X3101 is undertaken over one I/O line. This is permitted ONLY if no simultaneous read/write operations occur.
21
SCK Serial data clock input. The Serial Clock controls the serial bus timing for data input and output. Opcodes, addresses, or
data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin change after the falling
edge of the clock input.
22
CS
Chip select input pin. When CS is HIGH, the device is deselected and the SO output pin is at high impedance. CS LOW
enables the SPI serial bus.
3
FN8110.1
January 3, 2008