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X3100-01 Datasheet, PDF (15/41 Pages) Intersil Corporation – Cell Balancing Control
X3100, X3101
Table 20. Over-charge Protection Mode—Event Diagram Description
Event
[0,1)
[1]
(1,2)
[2]
Event Description
— Discharge FET is ON (UVP/OCP = VSS).
— Charge FET is ON (OVP/LMON = VSS), and hence battery cells are permitted to receive charge.
— All cell voltages (VCELL - VCELL4) are below the over-charge voltage threshold (VOV).
— The device is in normal operation mode (i.e. not in a protection mode).
— The voltage of one or more of the battery cells (VCELL), exceeds VOV.
— The internal over-charge detection delay timer begins counting down.
— The device is still in normal operation mode
The internal over-charge detection delay timer continues counting for TOV seconds.
The internal over-charge detection delay timer times out
AND
VCELL still exceeds VOV.
(2,3)
[3]
— Therefore, the internal over-charge sense circuitry switches the charge FET OFF (OVP/LMON=Vcc).
— The device has now entered over-charge protection mode.
While in over-charge protection mode:
— The battery cells are permitted to discharge via the discharge FET, and diode D2 across the charge FET
— The X3100 or X3101 monitors the voltages VCELL1 - VCELL4 to determine whether or not they have all fallen
below the “Return from over-charge threshold” (VOVR).
— (It is possible to change the status of UVP/OCP or OVP/LMON using the control register)
— All cell voltages fall below VOVR—The device is now in normal operation mode.
— The X3100/X3101 automatically switches charge FET = ON (OVP/LMON = Vss)
— The status of the discharge FET remains unaffected.
— Charging of the battery cells can now resume.
15
FN8110.1
January 3, 2008