X3100-01 Datasheet, PDF (17/41 Pages) Intersil Corporation – Cell Balancing Control

X3100, X3101
Figure 4. Over-discharge Protection Mode—Event Diagram
VCC
VCELL
V_UV
0.7V
Cell Charge Prohibited if SWCEN=0
AND V_CELL < V_CE
V_SLR
T_UVR
V_UVR
V_CE
UVP/OCP
OVP/LMON
RGO
T_UV
Over-discharge Protection Mode
The Longer of TOV+200ms OR TUV+200ms
Sleep Mode
Note 1, 2
Note 3
V_CC
V_SS
V_CC
V_SS
5V
Event
0
1
2
0V
3
4
5
Note 1: If SWEN = 0 and V_CELL < V_CE, then OVP/LMON stays high and charging is prohibited.
Note 2: OVP/LMON stays high until the microcontroller writes a “1” to the OVPC bit in the control register. This sets the signal low, which turns on the
charge FET. It cannot be turned on prior to this time.
Note 3: UVP/OCP stays high until the microcontroller writes a “1” to the UVPC bit in the control register. This sets the signal low, which turns on the
discharge FET. The FET cannot be turned on prior to this time.
Table 22. Over-discharge Protection Mode—Event Diagram Description
Event
[0,1)
[1]
(1,2)
[2]
(2,3)
Event Description
— Charge FET is ON (OVP/LMON = V_SS)
— Discharge FET is ON (UVP/OCP = V_SS), and hence battery cells are permitted to discharge.
— All cell voltages (VCELL₁ - VCELL₄) are above the Over-discharge threshold voltage (V_UV).
— The device is in normal operation mode (i.e. not in a protection mode).
— The voltage of one or more of the battery cells (V_CELL), falls below V_UV.
— The internal over-discharge detection delay timer begins counting down.
— The device is still in normal operation mode
The internal over-discharge detection delay timer continues counting for T_UV seconds.
— The internal over-discharge detection delay timer times out, AND V_CELL is still below V_UV.
— The internal over-discharge sense circuitry switches the discharge FET OFF (UVP/OCP = Vcc).
— The charge FET is switched OFF (OVP/LMON = V_CC).
— The device has now entered over-discharge protection mode.
— At the same time, the device enters sleep mode (See section “Voltage Regulator” on page 22).
While device is in sleep (in over-discharge protection) mode:
— The power to ALL internal circuits is switched OFF limiting power consumption to less than 1µA.
— The output of the 5VDC voltage regulator (RGO) is 0V.
— Access to the X3100/X3101 via the SPI port is NOT possible.
17
FN8110.1
January 3, 2008