82443ZX Datasheet, PDF (64/116 Pages) Intel Corporation – Intel® 440ZX AGPset: Host Bridge/Controller

Register Description
3.3.37 MBFS—Memory Buffer Frequency Select Register
(Device 0)
Address Offset:
Default Value:
Access:
Size:
CA–CCh
000000h
Read/Write
24 bits
The settings in this register enable the 100 MHz or 66 MHz buffers for each of the following signal
groups.
Note: The choice of 100 MHz or 66 MHz buffer is independent of bus frequency. It is possible to select a
100 MHz memory buffer even though the bus frequency is 66 MHz (and vice versa).
Bit
23
22
21
20
19
18:16
15
14
13
12:11
10
9
Description
Reserved
MAA[13:0], WEA#, SRASA#, SCASA# (100 MHz/66 MHz buffer select bit). This bit enables
either 100 MHz or 66 MHz buffers for MAA[13:0], WEA#, SRASA#, SCASA#.
0 = 66 MHz
1 = 100 MHz
Not Applicable in the 82443ZX.
MD [63:0] (100 MHz/66 MHz buffer select bit [Control 2]). This bit enables either 100 MHz or
66 MHz buffers for MD [63:0] [Control 2]. (Refer to the corresponding MBSC register for
programming details).
0 = 66 MHz
1 = 100 MHz
MD [63:0] (100 MHz/66 MHz buffer select bit [Control 1]). This bit enables either 100 MHz or
66 MHz buffers for MD [63:0] [Control 1]. (Refer to the corresponding MBSC register for
programming details).
0 = 66 MHz
1 = 100 MHz
Not Applicable in the 82443ZX.
CSA7#/CKE3 (100 MHz/66 MHz buffer select bit). This bit enables either 100 MHz or 66 MHz
buffers for CSA7#/CKE3.
0 = 66 MHz
1 = 100 MHz
Not Applicable in the 82443ZX.
CSA6#/CKE2 (100 MHz/66 MHz buffer select bit). This bit enables either 100 MHz or 66 MHz
buffers for CSA6#/CKE2.
0 = 66 MHz
1 = 100 MHz
Not Applicable in the 82443ZX.
CSA3#/RASA3#, CSB3#/RASB3# (100 MHz/66 MHz buffer select bit). This bit enables either
100 MHz or 66 MHz buffers for CSA3#/RASA3#, CSB3#/RASB3#.
0 = 66 MHz
1 = 100 MHz
CSA2#/RASA2#, CSB2#/RASB2# (100 MHz/66 MHz buffer select bit). This bit enables either
100 MHz or 66 MHz buffers for CSA2#/RASA2#, CSB2#/RASB2#.
0 = 66 MHz
1 = 100 MHz
3-40
82443ZX Host Bridge Datasheet