82443ZX Datasheet, PDF (101/116 Pages) Intel Corporation – Intel® 440ZX AGPset: Host Bridge/Controller

Functional Description
4.7
System Clocking
Figure 4-2 shows the clock architecture for a typical Intel^® 440ZX AGPset system.
Figure 4-2. Typical Intel^® 440ZX AGPset System Clocking
CK100
BXPCLKx
33 MHz
100/66#
CPU/HCLK
100/66MHz
BXHCLK
100/66MHz
PCLKx
33 MHz
Pentium^® II
Processor
GCLKOUT
133/66MHz
GCLKIN
82443ZX
DCLK
100/66MHz
DCLKWR
CKBF
DCLK[15:0]
SDRAM
4.8
4.8.1
Power Management
This section focuses on the 82443ZX power management features only. The PIIX4E datasheet
along with this section provide the complete system power management description.
Overview
Power Management Features Supported by the 82443ZX
• Clock Control
• SMRAM
• ACPI and PCI-PM
Low-Power Modes Supported by the 82443ZX
The 82443ZX supports a minimum of system-wide low power modes using the following
functions:
• Hardware interface with PIIX4E is used to indicate:
— Whether to reset “resume logic” during resume from Suspend to Disk (STD).
Based on the above function, the 82443ZX distinguishes the following system-wide low power
modes:
• STD resume is handled the same as power on sequence, including complete reset of 82443ZX
state.
82443ZX Host Bridge Datasheet
4-21