6300ESB Datasheet, PDF (422/848 Pages) Intel Corporation – I/O Controller Hub

Intel^® 6300ESB ICH—8
8.9.8 TCO1_CNT—TCO1 Control Register
Table 308. TCO1_CNT—TCO1 Control Register
Device: 31
I/O Address: TCOBASE +08h
Default Value: 0000h
Lockable: No
Function: 0
Attribute: Read-Only, Read/Write Clear
Size: 16-bit
Power Well: Core
Bits
15:1
3
12
11
10
9
8
7:0
Name
Reserved
TCO_LOCK
TCO_TMR_HLT: TCO
Timer Halt
SEND_NOW
NMI2SMI_EN
NMI_NOW
Reserved
Description
Reserved.
0 = This bit defaults to 0. A core-well reset is required to
change this bit from 1 to 0.
1 = Prevents writes from changing the TCO_EN bit (in offset
30h of Power Management I/O space). Once this bit is set
to 1, it can not be cleared by software writing a 0 to this
bit location.
0 = The TCO Timer is enabled to count.
1 = The TCO Timer will halt. It will not count, and thus cannot
reach a value that will cause an SMI# or set the
SECOND_TO_STS bit. When set, this bit will prevent
rebooting and prevent Alert On LAN event messages from
being transmitted on the SMLINK (but not Alert On LAN*
heartbeat messages).
0 = The Intel^® 6300ESB ICH will clear this bit when it has
completed sending the message. Software must NOT set
this bit to 1 again until the Intel^® 6300ESB ICH has set it
back to 0.
1 = Writing a 1 to this bit will cause the Intel^® 6300ESB ICH
to send an Event message with the Software Event bit
set.
0 = Normal NMI functionality.
1 = Forces all NMIs to instead cause SMIs. The functionality
of this bit is dependent upon the settings of the NMI_EN
bit and the GBL_SMI_EN bit as detailed in the following
table:
NMI_ENGBL_SMI_ENDescription
0
0
No SMI# at all because GBL_SMI_EN = 0
0
1
SMI# will be caused due to NMI events
1
0
No SMI# at all because GBL_SMI_EN = 0
1
1
No SMI# due to NMI because NMI_EN = 1
0 = This bit is cleared by writing a 1 to the bit position. The
NMI handler is expected to clear this bit. Another NMI will
not be generated until the bit is cleared.
1 = Writing a 1 to this bit causes an NMI. This allows the
BIOS or SMI handler to force an entry to the NMI handler.
Reserved.
Access
R/W
R/W
R/W
R/W
R/WC
Intel^® 6300ESB I/O Controller Hub
DS
422
November 2007
Order Number: 300641-004US