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HYB25D256400B Datasheet, PDF (67/83 Pages) Infineon Technologies AG – 256 Mbit Double Data Rate SDRAM
HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM
Electrical Characteristics
Table 22
Symbol
IDD Specifications
DDR200 DDR266A
-8
-7
DDR266
-7F
DDR333
-6
DDR400B Unit
-5
typ. max. typ. max. typ. max. typ. max. typ. max.
IDD0
70 90 75 100 83 110 85 110 70 90 mA
72 95 77 105 86 115 88 115 75 90 mA
IDD1
80 100 90 110 98 120 100 120 80 100 mA
83 105 94 115 102 125 104 125 95 110 mA
IDD2P
5
7
6
8
6
8
6
9
IDD2F 30 35 35 40 35 40 45 55
IDD2Q 18 22 20 25 20 25 25 28
IDD3P 13 16 15 18 15 18 18 21
IDD3N 40 45 50 55 50 55 60 65
42 50 52 60 52 60 63 70
4
5 mA
30 36 mA
20 28 mA
13 18 mA
38 45 mA
43 54 mA
IDD4R 79 95 95 115 95 115 110 140 85 100 mA
89 110 107 130 107 130 124 160 100 120 mA
IDD4W 85 105 105 125 105 125 125 145 90 105 mA
96 120 119 140 119 140 141 165 100 130 mA
IDD5
126 170 135 180 135 180 144 190 140 190 mA
IDD6
1.5 2.5 1.5 2.5 1.5 2.5 1.5 2.5 1.4 2.8 mA
1.20 1.25 1.20 1.25 1.20 1.25 1.20 1.25 — — mA
IDD7
150 210 171 225 171 225 208 270 210 250 mA
158 220 180 235 180 235 218 285 210 250 mA
Note/Test
Condition1)
2)
x4/x8 3)
x16 3)
x4/x8 3)
x16 3)
3)
3)
3)
3)
3)
x16 3)
x4/x8 3)
x16 3)
x4/x8 3)
x16 3)
3)
standard power3)4)
low power
x4/x8 3)
x16 3)
1) Test conditions for typical values: VDD = 2.5 V (DDR333), VDD = 2.6 V (DDR400), TA = 25 °C, test conditions for maximum
values: VDD = 2.7 V, TA = 10 °C
2) IDD specifications are tested after the device is properly initialized and measured at 100 MHz for DDR200, 133 MHz for
DDR266, 166 MHz for DDR333, and 200 MHz for DDR400.
3) Input slew rate = 1 V/ns.
4) Enables on-chip refresh and address counters.
Data Sheet
67
Rev. 1.2, 2004-02
02102004-TSR1-4ZWW