HYB25D256400B Datasheet, PDF (49/83 Pages) Infineon Technologies AG – 256 Mbit Double Data Rate SDRAM

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM
Functional Description
Table 7 Truth Table 2: Clock Enable (CKE)
Current State CKE n-1 CKEn
Command n
Action n
Notes
Previous Current
Cycle
Cycle
Self Refresh L
L
X
Self Refresh L
H
Deselect or NOP
Maintain Self-Refresh
–
Exit Self-Refresh
1)
Power Down L
L
X
Maintain Power-Down
–
Power Down L
H
Deselect or NOP
Exit Power-Down
–
All Banks Idle H
L
Deselect or NOP
Precharge Power-Down Entry –
All Banks Idle H
L
AUTO REFRESH
Self Refresh Entry
–
Bank(s) Active H
L
Deselect or NOP
Active Power-Down Entry
–
H
H
See “Truth Table 3:
–
–
Current State Bank n -
Command to Bank n (same
bank)” on Page 49
1) Deselect or NOP commands should be issued on any clock edges occurring during the Self Refresh Exit (t_XSNR) period. A
minimum of 200 clock cycles are needed before applying a read command to allow the DLL to lock to the input clock.
1. CKEn is the logic state of CKE at clock edge n: CKE n-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND n is the command registered at clock edge n, and ACTION n is a result of COMMAND n.
4. All states and sequences not shown are illegal or reserved.
Table 8 Truth Table 3: Current State Bank n - Command to Bank n (same bank)
Current State CS
Any
H
L
Idle
L
L
L
Row Active L
L
L
Read
L
(Auto
Precharge _L
Disabled)
L
Write
L
(Auto
L
Precharge
Disabled)
L
RAS CAS WE
XXX
HHH
L HH
LLH
LLL
HL H
HL L
L HL
HL H
L HL
HHL
HL H
HL L
L HL
Command
Deselect
No Operation
Active
AUTO REFRESH
MODE
REGISTER SET
Read
Write
Precharge
Read
Precharge
BURST
TERMINATE
Read
Write
Precharge
Action
NOP. Continue previous operation
NOP. Continue previous operation
Select and activate row
–
–
Notes
1) to 6)
1) to 6)2)
1) to 6)3)
1) to 7)4)
1) to 7)5)
Select column and start Read burst ^{1) to 6), 10)}
Select column and start Write burst ^{1) to 6), 10)7)}
Deactivate row in bank(s)
1) to 6), 8)
Select column and start new Read ^{1) to 6), 10)9)}
burst
Truncate Read burst, start
1) to 6), 8)10)
Precharge
BURST TERMINATE
1) to 6), 9)11)
Select column and start Read burst ^{1) to 6), 10), 11)}
Select column and start Write burst ^{1) to 6), 10)}
Truncate Write burst, start
1) to 6), 8), 11)
Precharge
1) This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Truth Table 2: Clock Enable (CKE) and after t_XSNR /
t_XSRD has been met (if the previous state was self refresh).
Data Sheet
49
Rev. 1.2, 2004-02
02102004-TSR1-4ZWW