TC1798 Datasheet, PDF (17/200 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1798
System Overview of the TC1798Block Diagram
Figure 1 shows the block diagram of the SAK-TC1798F-512F300EL / SAK-TC1798F-
512F300EP.
EBU
FPU
PMI
DMI
32 KB PSPR
16 KB ICACHE
TriCore
CPU
128_LDKB_RAD_MSPR
16 KB DCACHE
DCACHE
M/S
M/S
Cross Bar Interconnect (SRI)
LMU
128 KB
SRAM
S
XBAR
Abbreviations:
ICACHE: Instruction Cache
DCACHE Data Cache
PSPR: Program Scratch-Pad RAM
DSPR: Data Scratch-Padl Data RAM
BROM: Boot ROM
PFlash: Program Flash
DFlash: Data Flash
PRAM: Parameter RAM in PCP
CMEM: Code RAM in PCP
XBAR: SRI Cross Bar (XBar_SRI)
S : On Chip Bus Slave Interface
M : On Chip Bus Master Interface
S
PMU0
2 MB PFlash
192 KB DFlash
16 KB BROM
KeyFlash
S
PMU1
2 MB PFlash
M/S
Bridge
(SFI)
M/S
M
DMA
16 channels
(MemCheck)
M/S
OCDS L1 Debug
Interface / JTAG
2
MLI
2
ASC
4
SSC
SSCG
4
SSC Guardian
E-Ray
(2 Channels)
MultiCAN
(4 Nodes, 128 MO)
SENT
(8 channels )
GPTA 0
GPTA1
LTCA2
16 KB PRAM
Interrupt
System
PCP2
Core
STM
32 KB CMEM
SBCU
Ports
2
CCU6
(2xCCU6)
2
GPT120
2
MSC
(LVDS)
External
Request Unit
FCE
SCU
FM-PLL
PLL E-RAY
System Peripheral Bus (SPB)
SDMA
8 channels
BMU
5V (3.3V supported as well)
Ext. ADC Supply
ADC0
ADC1
ADC2
ADC3
(5V max)
64
FADC
(3.3V max)
8
3.3V
Ext. FADC Supply
TC1798
Figure 2 Block Diagram
Figure 1 shows the block diagram of the SAK-TC1798N-512F300EP.
Data Sheet
10
V 1.1, 2014-05