TC1798 Datasheet, PDF (150/200 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

5.3.2 Power Sequencing
TC1798
Electrical ParametersAC Parameters
V
5V
3.3V
1.3V
5.25V
4.75V
3.47V
3.0V
1.365V
1.235V
V_DDP
0.5V 0.5V
V_AREF
-12%
-12%
0.5V
t
PORST
power
down
power
fail
t
Power-Up 10.vsd
Figure 12 5 V / 3.3 V / 1.3 V Power-Up/Down Sequence
The following list of rules applies to the power-up/down sequence:
• All ground pins V_SS must be externally connected to one single star point in the
system. Regarding the DC current component, all ground pins are internally directly
connected.
• At any moment in time to avoid increased latch-up risk,
each power supply must be higher then any lower_power_supply - 0.5 V, or:
VDD5 > VDD3.3 - 0.5 V; VDD5 > VDD1.3 - 0.5 V;VDD3.3 > VDD1.3 - 0.5 V, see
Figure 12.
– The latch-up risk is minimized if the I/O currents are limited to:
– 20 mA for one pin group
– AND 100 mA for the completed device I/Os
– AND additionally before power-up / after power-down:
1 mA for one pin in inactive mode (0 V on all power supplies)
• During power-up and power-down, the voltage difference between the power supply
pins of the same voltage (3.3 V, 1.3 V, and 5 V) with different names (for example
VDDP, VDDFL3 ...), that are internally connected via diodes, must be lower than
Data Sheet
143
V 1.1, 2014-05