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IC-TW28 Datasheet, PDF (9/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR
WiCIT-HTAWU2TO8-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTpOERrReliminary
Rev D2, Page 9/80
ELECTRICAL CHARACTERISTICS
Operating conditions: AVDD = DVDD = IOVDD = 3.1...3.6 V, Tj = –40...+125 °C, reference point AVSS unless otherwise stated
Item Symbol Parameter
No.
Conditions
Unit
Min. Typ. Max.
Total Device
001 VDD
Permissible Supply Voltage
AVDD, DVDD, IOVDD
3.1
3.6
V
002 IAVDD
Supply Current into AVDD
AVDD, DVDD, IOVDD = 3.3 V, fin = 1 kHz,
inter = x256, ABZ and UVW outputs active
15
mA
003 IDVDD
Supply Current into DVDD
AVDD, DVDD, IOVDD = 3.3 V, fin = 1 kHz,
inter = x256, ABZ and UVW outputs active
22
mA
004 IIOVDD
Supply Current into IOVDD
RS422 drivers enabled (MAIN_CFG.rs422 = 1);
quadrature outputs terminated with 120 Ω
quadrature outputs open
85
mA
2.5 mA
Signal Inputs and Amplifiers: SIN+, SIN–, COS+, COS–
101 Vin()
Permissible Input Voltage
Refer to Figure 1
Low Input Range (MAIN_CFG.input = 0 or 1)
0.35
High Input Range (MAIN_CFG.input = 2)
0
AVDD - V
1.1
AVDD V
102 Ain()diff Permissible Differential Input Refer to Figure 1
Amplitude, Max(SIN+ – SIN–) or Low Input Range (MAIN_CFG.input = 0 or 1)
20
Max(COS+ – COS–)
High Input Range (MAIN_CFG.input = 2)
65
103 Vcm()
Permissible Input Common Mode Refer to Figures 1 and 2
Range, (SIN+ + SIN–)/2 or
Minimum gain
0.7
(COS+ + COS–)/2
Maximum gain
0.35
700 mV
2000 mV
AVDD - V
1.45
AVDD - V
1.1
104 fin()
Permissible Input Frequency
700 kHz
105 Vos()
Amplifier Input Offset Voltage
±20 mV
106 Ilk()
Input Leakage Current
±50 nA
108 OFFcorr Correctable Input Offset Voltage As percentage of input signal amplitude; input ±100
%
offset voltage is the sum of sensor offset plus
amplifier offset (item 105);
(step size: 3.9 mV / gain)
109 Acorr
Correctable Balance (Amplitude) Max(Asin, Acos) / Min(Asin, Acos), where Asin ±25
%
Mismatch
and Acos are the SIN/COS input amplitudes
respectively. (step size 0.2 %)
110 PHIcorr Correctable Phase Error
(step size 0.22°)
±26
°
111 Rin()diff Differential Input Resistance
Low Input Range (MAIN_CFG.input = 0)
10 1000
MΩ
Low with Loss Detect. (MAIN_CFG.input = 1)
0.240
MΩ
High Input Range (MAIN_CFG.input = 2)
0.670
MΩ
Zero Signal Inputs and Amplifier: ZERO+, ZERO-
201 Vin()
Permissible Input Voltage
0
AVDD V
202 Vcm()
Permissible Input Common Mode Refer to Figures 1 and 2
Voltage
Minimum gain
Maximum gain
0.7
AVDD - V
1.45
0.35
AVDD - V
1.1
203 Vos()
Input Referenced Offset Voltage
±20 mV
204 Ilk()
Input Leakage Current
±50 nA
205 OFFcorr Correctable Input Offset Voltage As percentage of input signal amplitude; input ±100
%
offset voltage is the sum of sensor offset plus
amplifier offset (item 105)
206 Rin()diff Differential Input Resistance
10 1000
MΩ
Converter Performance
303 INL
Integral Nonlinearity
Refer to Figure 4, 1 Vpp-diff SIN/COS input
with compensated offset, gain and phase
0.7
°
304 DNL
Differential Nonlinearity
Refer to Figure 4, 1 Vpp-diff SIN/COS input
with compensated offset, gain and phase
0.35
°