IC-TW28 Datasheet, PDF (76/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

xIRQ
xIRQ
xIRQ
xIRQ1
W^iCIT^-H^TA^WU²TO⁸-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTp^{OERrReliminary}
CHAINING MULTIPLE iC-TW28s
xIRQ2
xIRQ3
Rev D2, Page 76/80
Multiple iC-TW28 slaves can also be chained together
using a single SPI host. In this case, all devices are
accessed together as a group and all data is read back
together by the host in an extended response packet.
In a chained configuration, SCLK and xSS on all de-
vices are connected together while SI and SO, are
linked from one device to the next, as shown below.
The xIRQ outputs are configured as open-drain and
wire-OR’d together to a common interrupt request input
on the host.
iC-TW28 3
xSS
SCLK
SO
SI
xIRQ
iC-TW28 2
xSS
SCLK
SO
SI
xIRQ
iC-TW28 1
xSS
SCLK
SO
SI
xIRQ
3.3V
Host µP
xCS
SCLK
MO
xIRQ
MI
Figure 46: Chained Connection of Multiple iC-TW28s
In operation, the host³in²it^biⁱa^tstes communic³a²ti^bo^itn^s with all
of the iC_x-_STW_S 28s by activating the chip select output
(xCS) and sending three consecutive SPI commands
by clocking 3× 32 = 96 bits 1to the beginning o2f the
SI/SO chaiSnI(MO), wChoilmemaat nthde same tiCmoemrmeadnding the
96-bit response to the previous command from the end
of the SI/SO chain (MI). As long as the xSS input of
the iC-TW28s is held low, dat₀a is shifted throug₁h the
chained d_Se_Ovices from SI to SO. After_Ra_ell_spc_oo_nm_semands
ha³v²e^bib^tseen loaded t³o² t^bh^ite^s chained dev³i²ce^bs^it,^s the host
de-activates xSS to execute the commands simultane-
ously. This extended packet communication structure
is shown i3n Figure 47.
4
5
Command
Command
Command
With the interrupt request outputs wire-OR’d as shown
in Figure 46, the xIRQ outputs of all iC-TW28s must be
configured₂ as open-drain (M₃AIN_CFG.irqpp =₄0) and
a_Rn_ese_px_ot_ne_srn_eal pull-up_Rre_es_si_ps_oto_nsr _eis required_R, _ea_ss_posh_nso_ewn.
xSS
32 bits
32 bits
32 bits
SI Command 3 Command 2 Command 1
32 bits
32 bits
32 bits
Command 3 Command 2 Command 1
SO Response 3 Response 2 Response 1
Extended Response Packet
to Previous Extended Command Packet
Response 3 Response 2 Response 1
Extended Response Packet
to Extended Command Packet
Figure 47: Extended Communication Packet Structure With Chained iC-TW28s
xSS
Response to Command 1
Sampled Here
32 bits
32 bits