IC-TW28 Datasheet, PDF (13/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

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Rev D2, Page 13/80
OPERATING REQUIREMENTS: Encoder Link Interface
Operating Conditions: AVDD = DVDD = IOVDD = +3.1...+3.6 V, AVSS = DVSS = IOVSS = 0 V, Tj = –40...125 °C
Item Symbol Parameter
No.
Conditions
Min.
Max.
Encoder Link Activation Sequence Timing
I101 t1
Activation Sequence Interval 1
A+ > 2.4 V, A– > 2.4 V
0.25
2
I102 t2
Activation Sequence Interval 2
A+ < 0.8 V, A– > 2.4 V
t1 – 10% t1 + 10%
I103 t3
Activation Sequence Interval 3
A+ < 0.8 V, A– < 0.8 V
t1 – 10% t1 + 10%
I104 t4
Activation Sequence Interval 4
A+ > 2.4 V, A– < 0.8 V
t1 – 10% t1 + 10%
Encoder Link Interface Timing (after activation)
I105 fclk(A+) ELink Clock Frequency
Signal driven into A+
1.0
I106
I107
I108
I109
I110
t_D1(A+)
t_D2(A+)
t_S(A–)
t_H(A–)
t_P(A–)
ELink Clock Signal Hi Level Duration
ELink Clock Signal Lo Level Duration
ELink Input Setup Time
ELink Input Hold Time
ELink Output Propagation Delay
Signal driven into A+
Signal driven into A+
Signal driven into A–
Signal driven into A–
Signal driven out on A–
200
200
200
200
200
Unit
ms
ms
ms
ms
MHz
ns
ns
ns
ns
ns
Normal operation. iC-TW28 is driving
quadrature signals on A+ and A–.
t1
t2
0.25–2 ms
t1 ±10%
A+
t3
t1 ±10%
t4
t1 ±10%
A–
External driver starts to overpower iC- iC-TW28 stops driving A+ and A–.
TW28 by forcing A+ and A– high.
Encoder Link interface is now active.
Figure 6: Encoder Link Activation Sequence
t_D1
ELink CLK: A+
t_S
t_D2
tH
ELink IN: A–
tP
ELink OUT: A–
Figure 7: Encoder Link Read and Write Timing