IC-TW28 Datasheet, PDF (12/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

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Rev D2, Page 12/80
OPERATING REQUIREMENTS: SPI Interface
Operating conditions: AVDD = DVDD = IOVDD = +3.1...+3.6 V, AVSS = DVSS = IOVSS = 0 V, Tj = –40...125 °C
Item Symbol Parameter
No.
Conditions
Min.
SPI Interface Timing
I001 t_C1
Permissible Clock Cycle Time
see Elec. Char. No.: 704
50
I002 t_D1
Clock Signal Lo Level Duration
15
I003 t_D2
Clock Signal Hi Level Duration
15
I004 t_S1
Setup Time:
80
xSS lo before SCLK lo → hi
I005 t_H1
Hold Time:
50
xSS lo after SCLK hi → lo
I006 t_W1
Wait Time: between xSS lo → hi
200
and xSS hi → lo
with ADC Read as preceding command
600
I007 t_S2
Setup Time:
5
SI stable before SCLK lo → hi
I008 t_H2
Hold Time:
10
SI stable after SCLK lo → hi
I009 t_P1
Propagation Delay:
SO stable after xSS hi → lo
I010 t_P2
Propagation Delay:
SO high impedance after xSS lo → hi
I011 t_P3
Propagation Delay:
SO stable after SCLK hi → lo
Unit
Max.
ns
ns
ns
ns
ns
ns
ns
ns
ns
60
ns
25
ns
20
ns
xSS
SCLK
SI
SO
t_S1
t_S2
t_P1
t_W1
t_H1
t_C1
t_H2
t_P3
Figure 5: SPI Timing
t_P2
Hi-Z
t_D1
t_D2