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IC-TW28 Datasheet, PDF (41/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR
WiCIT-HTAWU2TO8-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTpOERrReliminary
Rev D2, Page 41/80
UVW_CFG
UVW_CFG is a static register used to configure the
UVW outputs (if used).
Value
0
1...7
INTER1.div (0x0102 Bits 4:2)
Description
Post-AB divider disabled
Minimum...maximum post-AB divider
Value
0
1...31
UVW_CFG.pairs (0x0100 Bits 4:0)
Description
32 UVW cycles per input cycle
1...31 UVW cycles per input cycle
Table 46: UVW Pole Pairs
If OUTPUT.uvwen = 0, UVW_CFG.pairs has no effect.
Table 50: Post-AB Divider
The actual value used by the post-AB divider, div, is
calculated as
div = INTER1.div + 1
INTER0
INTER0 is a static register containing the least signifi-
cant byte of the interpolation factor, INTER.
Value
0...255
INTER0.interlsb (0x0101)
Description
Interpolation factor LSB (INTER [7:0])
Table 47: Interpolation Factor LSB
When using the post-AB divider, the effective interpola-
tion factor, intereff, is
intereff = inter
div
The AB output frequency limit specified by ABLIMIT
applies to the AB frequency prior to the post-AB divider.
See Post-AB Divider on page 74 for more information.
INTER1
INTER1 is a static register containing the most signif-
icant bits of the interpolation factor and the post-AB
divider.
Value
0...3
INTER1.msbs (0x0102 Bits 1:0)
Description
Interpolation factor MSBs (INTER [9:8])
Table 48: Interpolation Factor MSB
The interpolation factor, INTER, is calculated as
INTER = 256 × INTER1.msbs + INTER0.lsb
AB
AB is a static register used to set the hysteresis of the
AB outputs.
Value
0 – 31
AB.hyst (0x0103 Bits 4:0)
Description
Minimum – maximum AB hysteresis
Table 51: AB Output Hysteresis
The hysteresis in sin/cos input degrees, abhyst, is cal-
culated as
abhyst[◦] = ±AB.hyst × 360◦
2048
and is the number of AB output edges per sin/cos input The equivalent hysteresis in output AB edges is a func-
cycle.
tion of the interpolation factor and the AB divider.
Value
0
1...7
8...1023
INTER (9:0)
Description
inter = 256
Reserved (do not use)
inter = INTER/4
Table 49: INTER (9:0)
UVW
UVW is a static register used to set the hysteresis of
the UVW outputs.
Value
0 – 31
UVW.hyst (0x0104 Bits 4:0)
Description
Minimum – maximum UVW hysteresis
inter is the actual interpolation factor in AB output cy-
cles per sin/cos input cycle.
Table 52: UVW Output Hysteresis
The hysteresis in sin/cos input degrees, uvwhyst, is
calculated as
360◦
uvwhyst = ±UVW .hyst ×
2048