IC-TW28 Datasheet, PDF (48/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

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Rev D2, Page 48/80
STAT_SEL
STAT_SEL is a static register is used to select whether
the status value bits in STAT_VAL or the latched status
bits in STAT_LATCH are used to generate an interrupt
(activate xIRQ).
STAT_SEL (0x0401)
Bit
Name
Description
0
oflow
Signal path overflow
1
falarm Input frequency alarm
2
laglim
Excessive position lag
3
inclim
Output frequency limited
4
lagfatl
Fatal position lag
5
scamp Input amplitude out of range
6
adapt
Adaption limit exceeded
7
res
Correction residue threshold exceeded
Table 88: Latched Status Selection
If a given STAT_SEL bit is zero, the corresponding
STAT_VAL condition is used to generate the interrupt.
If a given STAT_SEL bit is one, the corresponding
STAT_LATCH condition is used to generate the inter-
rupt. See Status and Fault Logic on page 59 for more
information.
STAT_IE
The STAT_IE register is used to enable the bits se-
lected by the STAT_SEL register to actually generate
an interrupt (activate xIRQ).
STAT_HIZ
STAT_HIZ is a static register used to enable the bits
selected by the STAT_SEL register to disable the
ABZ/UVW outputs.
STAT_HIZ (0x0403)
Bit
Name
Description
0
oflow
Signal path overflow
1
falarm Sin/cos input frequency too high
2
laglim
Filter lag limit exceeded
3
inclim
AB or UVW frequency limit exceeded
4
lagfatl
Fatal lag condition
5
scamp Sin/cos amplitude out of range
6
adapt
Adaption limit exceeded
7
res
Correction residue threshold exceeded
Table 90: Output Disable
If a bit in the STAT_HIZ register is 1, the correspond-
ing bit selected by the STAT_SEL register disables the
ABZ/UVW outputs when active. When disabled, the
ABZ/UVW outputs are in a high-impedance state. If a
bit in the STAT_HIZ register is 0, the corresponding bit
selected by the STAT_SEL register does not disable
the ABZ/UVW outputs when active. See Status and
Fault Logic on page 59 for more information.
STAT_FATAL
STAT_FATAL is a read-only register containing bits that
indicate fatal errors.
STAT_IE (0x0402)
Bit
Name
Description
0
oflow
Signal path overflow
1
falarm Input frequency alarm
2
laglim
Excessive position lag
3
inclim
Output frequency limited
4
lagfatl
Fatal position lag
5
scamp Input amplitude out of range
6
adapt
Adaption limit exceeded
7
res
Correction residue threshold exceeded
Table 89: Interrupt Enable
Bit
0
1
2
3–7
Name
eechk
ee2bit
interr
STAT_FATAL (0x0406)
Description
EEPROM checksum error
EEPROM read double bit error
Internal error
Reserved
Table 91: Fatal Errors
STAT_FATAL.eechk indicates an error in the checksum
of the internal EEPROM.
If a bit in the STAT_IE register is 1, the corresponding
bit selected by the STAT_SEL register generates an
interrupt when active. If a bit in the STAT_IE register is
0, the corresponding bit selected by the STAT_SEL reg-
ister does not generate an interrupt when active. See
Status and Fault Logic on page 59 for more information.
STAT_FATAL.ee2bit indicates a double bit error oc-
curred when reading the internal EEPROM.
STAT_FATAL.interr indicates that a fatal error occurred
in the iC-TW28.
Any of these errors will inhibit startup of the iC-TW28
or stop it during operation, requiring a power cycle to
reset. Fatal errors activate xIRQ and disable the ABZ
and UVW outputs. See Status and Fault Logic on page
59 for more information.