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IC-TW28 Datasheet, PDF (29/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR
WiCIT-HTAWU2TO8-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTpOERrReliminary
Rev D2, Page 29/80
SPI COMMUNICATION
The SPI port is a 4-wire slave interface which operates
in CPOL = 0 and CPHA = 0 mode only. This means that
the base (resting) value of SCLK is low, SI is sampled
on the rising edge of SCLK, and SO is changed on the
falling edge of SCLK. The active-low Slave Select input,
xSS, is used by the host µP to enable the SPI port to
initiate communication.
SPI communication uses an overlapped packet struc-
ture where the response to a command is returned while
the next command is being sent. Figure 21 shows this
for a single-device application, where the host controls
a single iC-TW28 slave (see Figure 20). See Bussing
Multiple iC-TW28s on page 75 and Chaining Multiple
iC-TW28s on page 76 for information on multiple-device
applications.
xSS
SI
32 bits
1
Command
32 bits
2
Command
32 bits
3
Command
32 bits
4
Command
32 bits
5
Command
0
1
2
3
4
SO
Response
Response
Response
Response
32 bits
32 bits Figure 213:2SbPitsI Overlapped Pack3e2tbSittsructure 32 bits
32 bits
xSSPSI command and response packets are always 32 bits
long and sent most-significant bit first. The host initi-
atSesI comCmoumnmicaantidon3withCtohme miCa-nTdW228 bCy odmrivminagndS1lave
Select (xSS) low and then clocking a 32-bit command
(1) to the Slave Input, SI. The serial clock (SCLK) signal
is not shown in Figure 21. The host drives xSS high
aeSxt OethceuteesnRdtheoesfpcotohnmesemc3oamndm.Ranedsppoancskee2t
and the iC-TW28
Response 1
32-bit response (1) to the initial command (1) on the
Slave Output, SO.
Command 3 Command 2 Command 1
The iC-TW28 always returns a response packet while
reading a command packet. The response packet (0)
returned while writing the first command packet (1) is
not deRfiensepdo.nse 3 Response 2 Response 1
Extended Response Packet
After waitingtofPorrethvieoucsoEmxmteannddedtoCboememxaencdutPedac, ktheet host
again drives xSS low and sends the next command
packet (2) to SI while at the same time reading the
Extended Response Packet
The availabtloe ErextaedndaenddCwomritmeacnodmPmacaknedt s are shown
in Figure 22 and explained in detail on the following
pages.
xSS
SI
Response to Command 1
Sampled Here
32 bits
32 bits
1
Command
2
Command
0
1
SO
Response