IC-TW28 Datasheet, PDF (42/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

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Rev D2, Page 42/80
FALARM
FALARM is a static register used to set the level of the
input frequency alarm.
Value
0 – 128
129 – 255
FALARM (0x0105)
Description
Min. – max. input frequency alarm level
Reserved (do not use)
Table 53: Input Frequency Alarm Level
An input frequency alarm (STAT_VAL.falarm) is acti-
vated if the sin/cos input frequency, finput, exceeds
ZERO0.threshold is a signed, 2’s complement value
used to define the width of the internal Z gating window.
The internal Z gating window is active whenever the
value of the conditioned ZERO input is greater than four
times the comparator threshold. See Z Test Mode and
Calibration on page 65 for more information.
Value
0
1
ZERO0.clr (0x0107 Bit 6)
Description
Multi-cycle counter is never cleared (reset)
Multi-cycle counter cleared on Z output
Table 56: Multi-Cycle Counter Clear Mode
FALARM
finput[MHz] = 1.56 ×
256
See Multi-Cycle Counter on page 67 for more informa-
tion.
FALARM is intended as a high input frequency alarm;
not for accurate detection of input frequency.
ABLIMIT
ABLIMIT is a static register used to set the level of the
AB output frequency limiter.
Value
0 – 255
ABLIMIT (0x0106)
Description
Max. – min. AB output frequency limit
Table 54: AB Output Frequency Limit
Value
0
1
ZERO0.mode (0x0107 Bit 7)
Description
Position captured on Z output
Position captured on Z gating window
Table 57: Position Capture Mode
If ZERO0.mode = 0, the 24-bit position (multi-cycle
counter plus angle) is captured whenever the Z outputs
are activated. If ZERO0.mode = 1, the 24-bit position
(multi-cycle counter plus angle) is captured whenever
the internal Z gating window is activated. See Position
Capture on page 69 for more information.
The actual AB output frequency limit fab, is calculated
as
12.5 MHz
fab[MHz] = _{(ABLIMIT + 1) × div}
The equivalent minimum time between AB edges,
tedge, is calculated as
tedge[ns] = 20(ABLIMIT + 1) × div
ZERO1
ZERO1 is a static register used to set the width of the
Z output pulse.
Value
0 – 15
ZERO1.zwidth (0x0108 Bits 3:0)
Description
Min. – max. Z pulse width
Table 58: Z Pulse Width
The AB output frequency limit specified by ABLIMIT
applies to the AB frequency prior to the post-AB di-
vider (div). See Post-AB Divider on page 74 for more
information.
ZERO0
ZERO0 is a static register used to set the threshold of
the Z channel comparator, the capture mode, and the
multi-cycle counter mode.
The actual width of the Z output pulse, zwidth, in AB
output edges, is calculated as
zwidth[edges] = ^{ZERO1.zwidth + 1}
div
ZERO1.zwidth must be less than INTER. See Z Test
Mode and Calibration on page 65 for more information.
Value
±31
ZERO0.threshold (0x0107 Bits 5:0)
Description
Z channel comparator threshold
Table 55: Z Comparator Threshold