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IC-TW28 Datasheet, PDF (36/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR
WiCIT-HTAWU2TO8-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTpOERrReliminary
Rev D2, Page 36/80
CONFIGURATION PARAMETERS
Register Map
The iC-TW28 contains two types of registers, static and
dynamic, as shown in Table 28 and Table 29. Static
registers are not changed or updated by the iC-TW28
during operation. Static registers generally contain con-
figuration data and their values are saved in the internal
EEPROM and restored after each startup. Static reg-
isters may be read or written using the SPI port or the
Encoder Link interface. Reserved bits in static registers
must be zero for proper operation, as shown.
Dynamic registers are updated by the iC-TW28 during
operation or auto calibration to reflect current operat-
ing conditions or status. In general, dynamic registers
are read-only, but the correction value registers can
be written and startup values are stored in the internal
EEPROM. Dynamic registers may be read via the SPI
port or the Encoder Link interface. Reserved bits in
dynamic registers are undefined.
Registers not shown are reserved and must not be ac-
cessed. Changes to static register values take effect
immediately.
Address Register Name
0x0000
0x0001
0x0002
0x000B
0x0010
0x0100
0x0101
0x0102
0x0103
0x0104
0x0105
0x0106
0x0107
0x0108
0x0109
0x010A
0x010B
0x010C
0x021A
0x021C
0x0300
0x0301
0x0302
0x0400
0x0401
0x0402
0x0403
0x0404
0x0405
0x0406
0x0601
0x0602
0x0603
MAIN_CFG
LED_CFG
LED_START
TEST
LED_PWM
UVW_CFG
INTER0
INTER1
AB
UVW
FALARM
ABLIMIT
ZERO0
ZERO1
OUTPUT
ZPHASE
UVWPH
PHASE_LSB
S_ADC
C_ADC
FILT_CFG
FILT_LAG
FILT_K
STAT_CFG
STAT_SEL
STAT_IE
STAT_HIZ
STAT_VAL
STAT_LATCH
STAT_FATAL
EE_ADDR
EE_DATA
EE_STAT
Bit 7
Bit 6
0
0
buffer
0
0
0
0
0
0
0
0
0
0
mode
0
uvwen
clr
0
abzen
0
0
0
0
0
0
0
0
0
0
res
adapt
res
adapt
res
adapt
res
adapt
res
adapt
Description
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
elinkoff
irqpp
rs422
noise
input
freq
auto
odrain
pol
en
Initial (Starting) LED PWM Value
0
0
0
z
0
we
Actual LED PWM Value
0
pairs
interlsb
0
div
intermsbs
0
hyst
0
hyst
input frequency alarm level
AB frequency limit
threshold
0
0
zwidth
uvwdir uvwpol abzdir
zpol
bpol
apol
msb
msb
0
0
uvw
z
Sine ADC MSB
Cosine ADC MSB
0
kpmax
fb
auto
0
threshold
ki
kp
enz
enc
long
filter
scamp lagfatl
inclim
laglim
falarm
oflow
scamp lagfatl
inclim
laglim
falarm
oflow
scamp lagfatl
inclim
laglim
falarm
oflow
scamp lagfatl
inclim
laglim
falarm
oflow
scamp lagfatl
inclim
laglim
falarm
oflow
interr
ee2bit
eechk
EEPROM address to read or write
EEPROM data
Validity of read EEPROM data
Type
Static
Static
Static
Static
Dyn
Static
Static
Static
Static
Static
Static
Static
Static
Static
Static
Dyn
Static
S/D
Dyn
Dyn
Static
Static
S/D
Static
Static
Static
Static
Dyn
Dyn
Dyn
Static
Dyn
Dyn
Table 28: iC-TW28 Register Map