IC-TW28 Datasheet, PDF (71/80 Pages) IC-Haus GmbH – 10-BIT SIN/COS INTERPOLATOR

W^iCIT^-H^TA^WU²TO⁸-C1A0L-BIBITRSATINIO/CNOASNINDTLEINREPODLRAIVTp^{OERrReliminary}
Rev D2, Page 71/80
SPI ONLY OUTPUT MODE
In SPI Only output mode, the ABZ/UVW outputs are dis-
abled and position (angle) is read via the SPI interface.
See SPI Only on page 56 for information on configuring
SPI only output mode.
SPI only output mode is useful in embedded applica-
tions because the AB output frequency limit (12.5 MHz)
is no longer in effect, enabling higher input frequen-
cies to be used. In addition, the integrated multi-cy-
cle counter allow the host processor or microcontroller
to sample the position less frequently than would oth-
erwise be necessary while still preserving directional
information.
Position is read via the SPI port by sending an SPI
command with rm = 0 or 3 in the SPI control byte. See
SPI Communication on page 29 for more information.
Because of the overlapped packet structure used by
the SPI port, it takes two commands to read the posi-
tion: one command to request the position, and another
command to read it back, as shown in Figure 40.
When multiple iC-TW28’s are chained together with a
single host microprocessor or microcontroller, the ex-
tended communication packet structure provides simul-
taneous position sampling for all devices. See Chaining
Multiple iC-TW28s on page 76 for more information.
In SPI only output mode, the 24-bit position is internally
updated every 20 ns. Thus, the position value read via
the SPI port may be up to 20 ns old at any given read.
Therefore, sequential position values may exhibit a jitter
equivalent to the distance (angle) moved by the sin/cos
inputs in 20 ns.
In most applications, position needs to be read back
by the host microprocessor or microcontroller at a fixed
rate. This is most easily accomplished using a se-
quence of null write (read only) commands with rm = 0.
At maximum SPI clock frequency, a new command can
be sent – and a new position value read – every 2 µs.
If the sin/cos inputs are moving at 500 kHz, they cover
a distance of 1 input cycle per SPI sample.
xSS
SI
Response to Command 1
Sampled Here
32 bits
32 bits
1
Command
2
Command
2 µs
InputCycles
SPISample ^{· 500, 000} Second ^{= 1.0cycles}
The position uncertainty due to the internal position
update rate is 0.01 input cycles (3.6^◦).
20 ns _{· 500, 000} InputCycles _{= 0.01cycles}
Update
Second
0
1
SO
Response
Figure 40: SPI Position Read
Note that the data in response packet 1 is sampled on
the falling edge of xSS at the beginning of command
packet 2, not command packet 1. Therefore, the com-
munication latency in reading position via the SPI port
is the length of one 32-bit SPI command, not two.
Thus the sampled position values will have a jitter of
3.6^◦ or 0.01 · 100% = 1%. Slower input speeds and/or
lower SPI sampling rates provide a proportionally lower
jitter percentage.
Note that the ADC values are internally updated only
every 320 ns. Thus, when reading a sin, cos, and zero
ADC read response packet, the jitter is 0.16 cycles
(57.6^◦) or 0.16 · 100% = 16%.
320 ns
InputCycles
Update ^{· 500, 000} Second ^{= 0.16cycles}