HY27US08121M Datasheet, PDF (34/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
CLE
CE
WE
ALE
RE
I/O
RB
tWHALL
tWHBH
tBHRL
tALLRL2
50h
Add. M Add. M Add. M Add. M
cycle 1 cycle 2 cycle 3 cycle 4
Data M
Data
Last
Command
Code
Address M Input
Busy
Data Output from M to
Last Byte or Word in Area C
Figure 28. Read C Operation, One Page AC Waveform
Note: 1. A0-A7 is the address in the Spare Memory area, where A0-A3 are valid and A4-A7 are don't care.
2. Only address cycle 4 is required.
Rev 0.6 / Oct. 2004
34