HY27US08121M Datasheet, PDF (15/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
CLE
CE
WE
ALE
RE
RB
I/O
00h/
01h/ 50h
Command
Code
tBLBH1
(read)
Address Input
Busy
Data Output (sequentially)
Figure 10. Read (A, B, C) Operation
Note: 1. If t_ELWL is less than 10ns, t_WLWH must be minimum 35ns, otherwise, t_WLWH may be minimum 25ns.
A9-A25(1)
Read A Command, x8 Devices
Area A
(1st half Page)
Area B
(2nd half
Page)
Area C
(Spare)
A9-A25(1)
Read A Command, x16 Devices
Area A
(main area)
Area C
(50h)
A0-A7
A0-A7
A9-A25(1)
Read B Command, x8 Devices
Area A
(1st half Page)
Area B
(2nd half
Page)
Area C
(Spare)
A0-A7
A9-A25(1)
A0-A3 (x8)
A0-A2 (x16)
Figure 11. Read Block Diagrams
Note: 1. Highest address depends on device density.
Read C Command, x8/x16 Devices
Area A
Area A/B
Area C
(Spare)
A4-A7 (x8), A3-A7 (x16) are don't care
Rev 0.6 / Oct. 2004
15