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HY27US08121M Datasheet, PDF (11/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
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HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Table 2. Bus Operation
BUS Operation
CE
Command Input
VIL
Address Input
VIL
Data Input
VIL
Data Output
VIL
Write Protect
X
Standby
VIH
ALE
VIL
VIH
VIL
VIL
X
X
CLE
RE
WE
WP
VIH
VIH
Rising
X(2)
VIL
VIH
Rising
X
VIL
VIH
Rising
X
VIL
Falling
VIH
X
X
X
X
VIL
X
X
X
X
I/O0 - I/O7
Command
Address
Data Input
Data Output
X
X
I/O8 - I/O15(1)
X
X
Data Input
Data Output
X
X
Note : (1) Only for x16 devices.
(2) WP must be VIH when issuing a program or erase command.
Table 3: Address Insertion, x8 Devices
Bus Cycle
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
I/O7
A7
A16
A24
VIL
I/O6
A6
A15
A23
VIL
I/O5
A5
A14
A22
VIL
I/O4
A4
A13
A21
VIL
I/O3
A3
A12
A20
VIL
I/O2
A2
A11
A19
VIL
I/O1
A1
A10
A18
VIL
I/O0
A0
A9
A17
A25
Note: (1). A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
(2). Any address input cycles will be ignored with tALS > 0ns.
Table4: Address Insertion, x16 Devices
Bus Cycle
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
I/O8-I/
O15
X
X
X
VIL
I/O7
A7
A16
A24
VIL
I/O6
A6
A15
A23
VIL
I/O5
A5
A14
A22
VIL
I/O4
A4
A13
A21
VIL
Note: (1). A8 is Don't Care in x16 devices.
(2). Any address input cycles will be ignored with tALS > 0ns.
(3). A1 is the Least Significant Address for x16 devices.
(4). The 01h Command is not used in x16 devices.
I/O3
A3
A12
A20
VIL
I/O2
A2
A11
A19
VIL
I/O1
A1
A10
A18
VIL
I/O0
A0
A9
A17
A25
Rev 0.6 / Oct. 2004
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