HY27US08121M Datasheet, PDF (30/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Alt.
Sym-
bol
t_WHRL
t_WLWL
Sym-
bol
Parameter
t_WHR
t_WC
Write Enable High to Read Enable Low
Write Enable Low to Write Enable
Low
Write Cycle time
3.3V
Device
1.8V
Device
Unit
Min
60
ns
Min
50
80
ns
Note: (1). The time to Ready depends on the value of the pull-up resistor tied to the Ready/Busy pin. See Figures 32, 33 and 34.
(2). To break the sequential read cycle, CE must be held High for longer than t_EHEL.
(3). ES = Electronic Signature.
(4). 1G DDP
CLE
tCLHWL
(CLE Setup time)
tELWL
(CE Setup time)
CE
tHWCLL
(CLE Hold time)
tWHEH
(CE Hold time)
WE
tALLWL
(ALE Setup time)
tWLWH
tWHALH
(ALE Hold time)
ALE
tDVWH
(Data Setup time)
tWHDX
(Data Hold time)
I/O
Command
Figure 21. Command Latch AC Waveforms
Rev 0.6 / Oct. 2004
30