HY27US08121M Datasheet, PDF (29/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Table 15: AC Characteristics for Operation (3.3V Device and 1.8V Device)
Alt.
Sym-
bol
Sym-
bol
Parameter
t_ALLRL1
t_{AR1 Address Latch Low to Read Enable}
Read Electronic Signature
Min
t_ALLRL2
t_AR2
Low
Read cycle
Min
t_BHRL
t_BLBH1
t_RR Ready/Busy High to Read Enable Low
Min
t_R
Read Busy time, 512Mb, 1Gb⁴⁾ Max
t_BLBH2
t_PROG
Program Busy time
Max
t_BLBH3
t_BERS
Erase Busy time
Max
Ready/Busy Low to Ready/Busy High Reset Busy time, during ready Max
t_BLBH4
t_RST
Reset Busy time, during read
Max
Reset Busy time, during program Max
Reset Busy time, during erase
Max
t_CLLRL
t_CLR Command Latch Low to Read Enable Low
Min
t_DZRL
t_IR Data Hi-Z to Read Enable Low
Min
t_EHBH
t_CRY Chip Enable High to Ready/Busy High (CE intercepted read)
Max
t_EHEL
t_CEH Chip Enable High to Chip Enable Low⁽²⁾
Min
t_EHQZ
t_CHZ Chip Enable High to Output Hi-Z
Max
t_ELQV
t_CEA Chip Enable Low to Output Valid
Max
t_RHBL
t_RB Read Enable High to Ready/Busy Low
Max
t_RHRL
Read Enable High to Read Enable
t_REH
Read Enable High Hold time
Min
Low
Min
t_RHQZ
t_RHZ Read Enable High to Output Hi-Z
Max
t_RLRH
Read Enable Low to Read Enable
t_RP
High
Read Enable Pulse Width
Min
t_RLRL
t_RC Read Enable Low to Read Enable Low
Read Cycle time
Min
t_RLQV
t_REA
t_READID
Read Enable Low to Output Valid
Read Enable Access time
Max
Read ES Access time
t_WHBH
t_R
Write Enable High to Ready/Busy High
Max
t_WHBL
t_WB Write Enable High to Ready/Busy Low
Max
3.3V
Device
1.8V
Device
10
25
50
80
20
12
15
500
3
5
5
10
500
10
0
70+tr⁽¹⁾
100
20
45
75
100
15
20
15
30
30
60
50
80
35
60
45
12
15
100
Unit
ns
ns
ns
us
us
ms
us
us
us
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
Rev 0.6 / Oct. 2004
29