HY27US08121M Datasheet, PDF (21/43 Pages) Hynix Semiconductor – 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash

HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Table 6: Status Register Bit
Bit
SR7
NAME
Write Protection
SR6
SR5
SR4, SR3, SR2
SR0
Program/Erase/Read
Controller
Program/ Erase/ Read
Controller
Reserved
Generic Error
Logic Level
'1'
'0'
'1'
'0'
'1'
'0'
Don't Care
'1'
'0'
Definition
Not Protected
Protected
P/E/R C Inactive, device ready
P/E/R C active, device busy
P/E/R C inactive, device ready
P/E/R C active, device busy
Error - Operation failed
No Error - Operation successful
Read Electronic Signature
The device contains a Manufacturer Code and Device Code. To read these codes two steps are required:
1. first use one Bus Write cycle to issue the Read Electronic Signature command (90h)
2. then subsequent Bus Read operations will read the Manufacturer Code and the Device Code until another command
is issued.
Refer to Table, Read Electronic Signature for information on the addresses.
Part Number
HY27US08121M
HY27SS08121M
HY27US16121M
HY27SS16121M
Manufacture Code
ADh
ADh
00ADh
00ADh
Device Code
76h
36h
0056h
0046h
Bus Width
x8
x8
x16
x16
Automatic Page 0 Read at Power-Up
Automatic Page 0 Read at Power-Up is an option available on all devices belonging to the NAND Flash 528 Byte/264
Word Page family. It allows the microcontroller to directly download boot code from page 0, without requiring any
command or address input sequence. The Automatic Page 0 Read option is particularly suited for applications that
boot from the NAND.
Devices delivered with Automatic Page 0 Read at Power-Up can have the Sequential Row Read option either enabled
ordisabled.
Automatic Page 0 Read Description.
At powerup, once the supply voltage has reached the threshold level, V_CCth, all digital outputs revert to their reset
state and the internal NAND device functions (reading, writing, erasing) are enabled.
The device then automatically switches to read mode where, as in any read operation, the device is busy for a time
t_BLBH1 during the data is transferred to the Page Buffer. Once the data transfer is complete the Ready/Busy signal goes
High. The data can then be read out sequentially on the I/O bus by pulsing the Read Enable, RE#, signal. Figures 18
and 19 show the power-up waveforms for devices featuring the Automatic Page 0 Read option.
Rev 0.6 / Oct. 2004
21