HD49235FS Datasheet, PDF (30/41 Pages) Hitachi Semiconductor – Digital Signal Processor for CD

HD49235FS
CLV Servo Control
Compact discs (CDs) are recorded at a constant linear velocity (CLV). This block performs CLV motor
control.
MSTOP: This CLV phase error output pin either is in the high-impedance state, or outputs a constant
low signal, a constant high signal, or a pulse-width modulated waveform with a duty cycle of 0 to
100%, depending on the CLV operating mode.
PWM: This CLV velocity error output pin either is in the high-impedance state, outputs a constant low
signal, outputs a constant high signal, or outputs a pulse-width modulated waveform with a duty cycle
of 0 to 100%, depending on the CLV operating mode.
MON: This output signal indicates when the disc motor is on. When the disc motor is on, this pin is at
the high level, except in stop mode.
PW64: This pin outputs the brake release signal.
ROTD: This pin can be used to monitor the most significant bit of the 7-bit (128-step) output at the
PWM pin.
CLVS: This output pin differentiates between the starting and normal CLV modes. High output
indicates normal mode.
Next the operating modes will be described. Table 2 indicates the CLV control output states in each
mode.
Table 2 CLV Control Output
CLV Mode
STOP
PLAY
ROT
KICK
BRAKE
ACS
START
NORM
ED3 to 0
0000
0110
1000
1001
1010
1100
1110
1111
MON
L
H
H
H
H
H
H
H
Outputs Signals
MSTOP (Phase Error)
PWM (Speed Error)
Z
Z
50% (starting mode)
0 to 100% (normal mode)
0 to 100%
50%
H
50%
Set by microprocessor
50%
L
50%
0 to 100%
50%
0 to 100%
0 to 100%
0 to 100%
1. Stop Mode
This is the state in which the motor is stopped. The free-running frequency of the data strobe VCO is
automatically adjusted in this mode.
Rev.2, Aug. 1995, page 30 of 41