HD49235FS Datasheet, PDF (23/41 Pages) Hitachi Semiconductor – Digital Signal Processor for CD

HD49235FS
Microprocessor Interface
DATA: Input pin for receiving microprocessor command data.
CLK: Clock input pin for receiving microprocessor command data.
XLT: Latch clock input pin for storing microprocessor command data in an internal register after serial
input.
XRST: Input pin for clearing the microprocessor command registers.
SENS: This output pin provides the microprocessor with the following servo information. For details,
see the microprocessor command descriptions.
 The SENS signal goes low when the number of pulses input at the CNIN pin reaches a value set by
the microprocessor. Alternatively, SENS toggles between low and high each time this value is
reached.
 When the constant linear velocity (CLV) servo operates in brake mode, SENS goes low to indicate
detection of an interval of 32 T or more. This indicates that braking has operated and the velocity
has fallen to 1/3 or less.
CNIN: This pin receives track-crossing pulses from the servo IC, so that the number of tracks can be
counted.
1. Data Transfer Format
The microprocessor interface transfers serial data using three signal lines: XLT, CLK, and DATA. See
the timing diagram in figure 12. D11 to D8 specify a register address and D7 to D0 give bit values to be
set in that register.
Notes: 1. When the external reset input signal (XRST) goes low all registers are reset to their default
values. See table 1.
2. Always write 0 in the following register bits:
D2 in register 8
D3 in register E
D7 and D6 in register F
3. Always write 1 in the following register bit:
D7 in register 9
Table 1 Default Values
Register Code
8 (1000)
9 (1001)
A (1010)
B (1011)
C (1100)
D (1101)
E (1110)
F (1111)
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Rev.2, Aug. 1995, page 23 of 41