GS4288C09 Datasheet, PDF(57/62 Page) GSI Technology – 32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II

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GS4288C09 Datasheet, PDF (57/62 Pages) GSI Technology – 32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II

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GS4288C09/18/36L

TAP DC Electrical Characteristics and Operating Conditions

Description

Condition

Symbol

Min

Max

Units

Notes

Input High (logic 1) Voltage

VIH

VREF + 0.15

VDD + 0.3

1, 2

Input High (logic 0) Voltage

VIL

VSS â 0.3

VREF â 0.15

1, 2

Input Leakage Current

Output disabled,

0 Vï£ï VIN ï£ï VDDQ

ILI

â5.0

5.0

ïï

Output Leakage Current

0 Vï£ï VIN ï£ï VDD

ILO

â5.0

5.0

ïï

Output Low Voltage

IOLC = 100 ïï

VOL1

0.2

Output Low Voltage

IOLT = 2mA

VOL2

0.4

Output High Voltage

ï·IOHC ï·= 100 ïï

VOH1

VDDQ â 0.2

Output High Voltage

ï·IOHTï·= 2mA

VOH2

VDDQ â 0.4

Notes:

1. All voltages referenced to VSS (GND).

2. Overshoot = VIH(AC) ï£ï VDD + 0.7 V for t ï£ï tTHTH/2; undershoot = VIL(AC)ï ï³ï â 0.5 V for t ï£ï tTHTH/2; during normal operation, VDDQ must

not exceed VDD.

Scan Register Sizes

Instruction

Bypass

Boundary Scan

Bit Size

113

JTAG TAP Instruction Codes

Instruction

Code

EXTEST

0000 0000

IDCODE

0010 0001

SAMPLE/PRELOAD 0000 0101

CLAMP

0000 0111

HIGH-Z

0000 0011

BYPASS

1111 1111

Description

Captures I/O ring contents; Places the Boundary Scan Register between TDI and TDO. Data

driven by output balls are determined from values held in the Boundary Scan Register.

Loads the ID register with the vendor ID code and places the register between TDI and TDO. This

operation does not affect LLDRAM II operations.

Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO. This

operation does not affect LLDRAM II operations.

Selects the bypass register to be connected between TDI and TDO. Data driven by output balls are

determined from values held in the Boundary Scan Register.

Selects the bypass register to be connected between TDI and TDO. All outputs are forced into

High-Z.

Places Bypass Register between TDI and TDO.This operation does not affect LLDRAM II

operations.

Rev: 1.03 7/2014

57/62

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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