GS4288C09 Datasheet, PDF (14/62 Pages) GSI Technology – 32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II

GS4288C09/18/36L
Commands
Valid control commands are listed below. Any input commands not shown are illegal or reserved. All inputs must meet specified
setup and hold times around the true crossing of CK.
Description of Commands
Command
Description
DSEL/NOP
The NOP command is used to perform a no operation to the LLDRAM II, which essentially deselects the
chip. Use the NOP command to prevent unwanted commands from being registered during idle or wait
states. Operations already in progress are not affected. Output values depend on command history.
The Mode Register is set via the address inputs A0–A17. See the Mode Register Definition diagrams for
MRS
further information. The MRS command can only be issued when all banks are idle and no bursts are in
progress.
READ
The Read command is used to initiate a burst read access to a bank. The value on the BA0–BA2 inputs
selects the bank, and the address provided on inputs A0–An selects the data location within the bank.
WRITE
The Write command is used to initiate a burst write access to a bank. The value on the BA0–BA2 inputs
selects the bank, and the address provided on inputs A0–An selects the data location within the bank.
Input data appearing on the DQ is written to the memory array subject to the DM input logic level
appearing coincident with the data. If the DM signal is registered Low, the corresponding data will be
written to memory. If the DM signal is registered High, the corresponding data inputs will be ignored (that
is, this part of the data word will not be written).
The AREF command is used during normal operation of the LLDRAM II to refresh the memory content
of a bank. The command is non-persistent, so it must be issued each time a refresh is required. The
AREF
value on the BA0–BA2 inputs selects the bank. The refresh address is generated by an internal refresh
controller, effectively making each address bit a “Don’t Care” during the AREF command.
See the Auto Refresh section for more details.
Notes:
1. When the chip is deselected, internal NOP commands are generated and no commands are accepted.
2. For the value of “n”, see Address Widths at Different Burst Lengths table.
Notes
1
—
2
2
—
Command Table
Operation
Command
CS
WE
REF
Device Deselect/No Operation
DSEL/NOP
H
X
X
MRS
MRS
L
L
L
Read
READ
L
H
H
Write
WRITE
L
L
H
Auto Refresh
AREF
L
H
L
Notes:
1. X= Don’t Care; H = Logic High; L = Logic Low; A = Valid Address; BA = Valid Bank Address.
2. For the value of “n”, see Address Widths at Different Burst Lengths table.
3. Only A0–A17 are used for the MRS command.
A0–An
X
CODE
A
A
X
BA0–BA2
X
1
X
1, 3
BA
1, 2
BA
1, 2
BA
1
Rev: 1.03 7/2014
14/62
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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