GS4288C09 Datasheet, PDF (31/62 Pages) GSI Technology – 32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II

GS4288C09/18/36L
Mode Register Definition in Multiplexed Address Mode
Ax A18...A10 A9 A8
A5 A4 A3
A0
Ay A18...A10
A9 A8
A4 A3
18–10
9876 5
Reserved¹ ODT IM DLL NA⁵ AM
43
BL
21 0
Config
Mode Register (Mx)
M9
On Die
Termination
0
Off (default)
1
On
M8 Drive Impedance
0 Internal 50³ (default)
1
External (ZQ)
M7
DLL Reset
0 _{DLL reset}⁴ _(default)
1
DLL enabled
M5
Address MUX
0 Nonmulitplexed (default)
1
Multiplexed
M2 M1 M0 Configuration
000
1² (default)
001
1²
010
2
011
3
100
4²
101
5
110
Reserved
111
Reserved
M4 M3
Burst
Length
0 0 2 (default)
01
4
10
8
1 1 Reserved
Notes:
1. A10–A18 must be set to zero.
2. BL = 8 is not available.
3. +/–30% over rated temperature range.
4. DLL RESET turns the DLL off.
5. Ay8 not used in MRS.
6. BA0–BA2 are “Don’t Care”.
7. Addresses A0, A3, A4, A5, A8, and A9 must be set as shown in order to activate the Mode Register in the Multiplexed Address mode.
Rev: 1.03 7/2014
31/62
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology