MB86941 Datasheet, PDF (44/49 Pages) Fujitsu Component Limited. – Peripheral LSI for SPARClite

MB86941/942
s REGISTER MAP
Block
name
IRC
RS5
to
RS0
(HEX)
Register
name
TM0
00H (TRIGGER
MODE 0)
TM1
01H (TRIGGER
MODE 1)
RS
02H (REQ
SENSE)
RC
03H (REQ
CLEAR)
04H
MASK
(MASK)
bit
15 14 13 12 11 10 9 8 7 6
CH15 CH14 CH13 CH12 CH11
CH7 CH6 CH5 CH4 CH3
15 14 13 12 11 10 9 8 7 6
15 14 13 12 11 10 9 8 7 6
15 14 13 12 11 10 9 8 7 6
54
CH10
CH2
54
54
54
3210
CH9 CH8
CH1 — —
3 2 1—
3 2 1—
3 2 1 IM
05H
IRL (IRL
Latch/Clear)
— — — — — — — — — — — CL
IRL LATCH
06H
Reserved
Reserved
07H
————————————————
————————————————
SDTR 0
SDR0
08H (SDTR
Data 0)
SCSR0
09H (SDTR
CM/ST 0)
————————
TRANSMIT DATA/
RECEIVE DATA
— — — — — — — — CONTROL DATA/STATUS DATA
0AH
Reserved
Reserved
0BH
————————————————
————————————————
SDTR 1
SDR1
0CH (SDTR
Dsta 1)
SCSR1
0DH (SDTR
CM/ST 1)
————————
————————
TRANSMIT DATA/
RECEIVE DATA
CONTROL DATA/
STATUS DATA
0EH
Reserved
Reserved
0FH
————————————————
————————————————
PRS0
PRESCALER0 10H (PRESCALE EX TEST — — —
0)
SELECT
PRESCALE VALUE
(Continued)
44