MB86941 Datasheet, PDF (20/49 Pages) Fujitsu Component Limited. – Peripheral LSI for SPARClite

MB86941/942
(2) Load Circuit
VDD
MB86941/2 ^Output
VSS
R1 = 2 KΩ
SW1
LSI tester
R2 = 2 KΩ
C
SW2
Condition
Normal output
Tri-state output (READY1#, READY2#)
Bi-directional pin (D bus)
L→H, H→L
L→Z, Z→L
L→Z, Z→L
Signal transmit
4. AC Characteristics
(1) Reset signal (Hardware reset)
Parameter
Reset pulse width
tCLK: See “(2) Clock Signals.”
RESET#
Load capacitance
MB86941
MB86942
60 pF
30 pF
65 pF
—
85 pF
30 pF
SW1
OFF
ON
OFF
SW2
OFF
OFF
ON
(MB86941: VDD = 5 V ± 5%, TA = 0 to +70°C)
(MB86942: VDD = 3.3 V ± 0.15 V, TA = 0 to +70°C)
Value
Symbol
Unit
Min.
Max.
tRSTW
20
—
tCLK
tRSTW
20