MB86941 Datasheet, PDF (33/49 Pages) Fujitsu Component Limited. – Peripheral LSI for SPARClite

MB86941/942
• Transmit Clock and Transmit Data
Parameter
Symbol
Transmit Clock “H” width
Transmit Clock “L” width
Interval from transmit clock falling
to transmit data output
tTCKHW
tTCKLW
tTCKDT
(MB86941: VDD = 5 V ± 5%, TA = 0 to +70°C)
(MB86942: VDD = 3.3 V ± 0.15 V, TA = 0 to +70°C)
Syncroh mode, × 1 mode ×1/16, ×1/64 mode
Unit
Min.
Max.
Min.
Max.
32
—
4
—
tCLK
14
—
4
—
tCLK
0
100
0
100
ns
tCLK: See “(2) Clock Signals”.
64 1
TCLK#
(× 1/64 mode)
tTCKLW
tTCKHW
23
30 31 32 33 34 35
62 63 64 1 2
⋅⋅⋅⋅⋅
⋅⋅⋅⋅⋅
16 1
TCLK#
(× 1/64 mode)
234
56
78
9 10 11 12 13 14 15 16 1 2
TCLK#
(× 1 mode,
Sync mode)
TRNDT
tTCKDT
tTCKLW
tTCKHW
tTCKDT
33