MB86941 Datasheet, PDF (41/49 Pages) Fujitsu Component Limited. – Peripheral LSI for SPARClite

MB86941/942
• Register Read Control Signal Output Timing
CLOCK
AS#
RCS#
A<1:0>
CS3# to CS0#
RD/WR#
DS#
RE#
WE#
RDYOUT#
RD/WR#
DS#
RE#
WE#
RDYOUT#
tRCSS
tADS
tECSD
*1
“H”
*2
“H”
*2
*1
tECNTD
tECNTD
*1
*1
tECNTD
tECNTD
*2
*2
tECNTD
tRCSH
tADH
tECSD
tECNTD
tECNTD
tECNTD
*1: Set register RTR0, RTR1.
*2: Set register WTR0, WTR1.
41