MC9S08GB60A Datasheet, PDF (91/302 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 6 Parallel Input/Output
6.6.2 Port B Registers (PTBD, PTBPE, PTBSE, and PTBDD)
Port B includes eight general-purpose I/O pins that share with the ATD function. Port B pins used as
general-purpose I/O pins are controlled by the port B data (PTBD), data direction (PTBDD), pullup enable
(PTBPE), and slew rate control (PTBSE) registers.
If the ATD takes control of a port B pin, the corresponding PTBDD, PTBSE, and PTBPE bits are ignored.
When a port B pin is being used as an ATD pin, reads of PTBD will return a 0 of the corresponding pin,
provided PTBDD is 0.
R
W
Reset
7
PTBD7
0
6
PTBD6
5
PTBD5
4
PTBD4
3
PTBD3
2
PTBD2
0
0
0
0
0
Figure 6-13. Port B Data Register (PTBD)
1
PTBD1
0
0
PTBD0
0
Table 6-5. PTBD Field Descriptions
Field
Description
7:0
PTBD[7:0]
Port B Data Register Bits — For port B pins that are inputs, reads return the logic level on the pin. For port B
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port B pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTBD to all 0s, but these 0s are not driven out on the corresponding pins because reset also
configures all port pins as high-impedance inputs with pullups disabled.
R
W
Reset
7
PTBPE7
0
6
PTBPE6
5
PTBPE5
4
PTBPE4
3
PTBPE3
2
PTBPE2
0
0
0
0
0
Figure 6-14. Pullup Enable for Port B (PTBPE)
1
PTBPE1
0
0
PTBPE0
0
Table 6-6. PTBPE Field Descriptions
Field
Description
7:0
PTBPE[7:0]
Pullup Enable for Port B Bits — For port B pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port B pins that are configured as outputs, these bits are ignored and the
internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
MC9S08GB60A Data Sheet, Rev. 2
Freescale Semiconductor
91