MC33596_10 Datasheet, PDF (8/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Frequency Planning
RF
Frequency CF1
(MHz)
304
0
315
0
426
0
433.92
0
868.3
1
916.5
1
Table 4. Crystal Frequency and CF Values Versus Frequency Band
CF0
LOF1
LOF0
F_REF (Crystal
Frequency)
(MHz)
F_IF (IF
Frequency)
(MHz)
Dataclk F_dataclk Digclk
Divider (kHz) Divider
F_digclk
(kHz)
T_digclk
(µs)
0
0
0
16.96745
0
1
0
17.58140
1
1
0
23.74913
1
0
1
24.19066
1
0
1
24.16139
1
1
1
25.50261
1.414
1.465
1.484
1.512
1.510
1.594
60 282.791 30 565.582 1.77
60 293.023 30 586.047 1.71
80 296.864 40 593.728 1.68
80 302.383 40 604.767 1.65
80 302.017 40 604.035 1.66
80 318.783 40 637.565 1.57
8.2 Intermediate Frequency
The IF filter is controlled by the crystal oscillator to guarantee the frequency over temperature and voltage
range. The IF filter center frequency, FIF, can be computed using the crystal frequency f_ref and the value
of the CF bits:
• If CF[0] = 0 : FIF = f_ref/9×1.5/2
• If CF[0] = 1 : FIF = f_ref/12×1.5/2
The cut-off frequency given in the parametric section can be computed by scaling to the FIF.
Example 1. Cut-off Frequency Computation
Compute the low cut-off frequency of the IF filter for a 16.9683 MHz crystal oscillator. For this
reference frequency, FIF = 1.414 MHz.
So, the 1.387 MHz¹ low cut-off frequency specified for a 1.5 MHz IF frequency becomes
1.387 × 1.414/1.5 = 1.307 MHz.
8.3 Frequency Synthesizer Description
The frequency synthesizer consists of a local oscillator (LO) driven by a fractional N phase locked loop
(PLL).
The LO is an integrated LC voltage controlled oscillator (VCO) operating at twice the RF frequency (for
the 868 MHz frequency band) or four times the RF frequency (for the 434 MHz and 315 MHz frequency
bands). This allows the I/Q signals driving the mixer to be generated by division.
The fractional divider offers high flexibility in the frequency generation for:
• Performing multi-channel links.
• Trimming the RF carrier.
Frequencies are controlled by means of registers. To allow for user preference, two programming access
methods are offered (see Section 16.3, “Frequency Register”).
• In friendly access, all frequencies are computed internally from the contents of the carrier
frequency and deviation frequency registers.
1. Refer to parameter 3.3 found in Section 19.3, “Receiver Parameters.”
MC33596 Data Sheet, Rev. 4
8
Freescale Semiconductor