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MC33596_10 Datasheet, PDF (45/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications
Transition Time
18 Transition Time
Table 21 details the different times that must be considered for a given transition in the state machine, once
the logic conditions for that transition are met.
Table 21. Transition Time Definition
Transition
State x -> y
Standby to SPI running, state 60 -> 1
Standby to receiver running, states 5 -> 5b, 20 -> 21
Off to receiver running, states 0 -> 0b, 10 -> 11
Configuration to receiver running,
states 1 -> (0b, 5b, 11, 21)
Receiver running to configuration mode,
state (0b, 5b, 11, 12, 13, 21, 22, 23) -> 1,
Crystal
Oscillator
Startup Time,
Parameter 5.10
PLL Timing
Receiver Receiver
Preamble On-to-Off Time,
Time1 Parameter 1.12
√
√
Lock time parameter
√
5.9
√
Lock time parameter
√
5.9
0 or lock time
√
parameter 5.1 or lock
time parameter 5.9 2
When CONFB=0, the transition from receive mode to configuration
mode is immediate.
Receiver running to standby mode,
√
state 5b -> 5, (21, 22, 23) -> 20
Receiver running to off mode,
√
state 0b -> 0, (11, 12, 13) -> 10
NOTES:
1 See Section 11.2.3, “Frame Format.”
2 Depending on the PLL status before entering configuration mode. For example, the transition time from standby to receiver
running (FSK modulation, 19.2 kBd, AFFC = 0, data manager enabled) is: 0.6 ms + 50 µs + (3 + 1)/19.2k = 970 µs.
MC33596 Data Sheet, Rev. 4
Freescale Semiconductor
45