MC33596_10 Datasheet, PDF (39/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Register Description
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit Name
—
—
—
—
F11
F10
F9
Reset Value
0
1
0
0
1
0
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit Name
F7
F6
F5
F4
F3
F2
F1
Reset Value
0
0
0
0
0
0
0
Figure 28. F Register
Bit 8
F8
0
Bit 0
F0
0
Addr
$04
$05
How this register is used is determined by the FRM bit, which is described below.
FRM = 0 (User Friendly Access)
Bits F[11:0] define the carrier frequency F_carrier. The local oscillator frequency F_LO is then set
automatically to F_carrier + F_IF (with F_IF = intermediate frequency).
FRM = 1 (Direct Access)
F[11:0] defines the receiver local oscillator frequency F_LO
Table 14 defines the value to be binary coded in the frequency registers F[11;0], versus the desired
frequency value F (in Hz).
Table 14. Frequency Register Value versus Frequency Value F
CF[1:0]
00, 01
11
Frequency Register Value
(2 x F/F_ref-35) x 2048
(F/F_ref-35) x 2048
Conversely, Table 15 gives the desired frequency F and the frequency resolution versus the value of the
frequency registers F[11;0].
Table 15. Frequency Value F versus Frequency Register Value
CF[1:0]
00, 01
11
Frequency (Hz)
(35 + F[11;0]/2048)xF_ref/2
(35 + F[11;0]/2048)xF_ref
Frequency Resolution (Hz)
F_ref/4096
F_ref/2048
16.4 Receiver On/Off Duration Register
Figure 29 describes the receiver on/off duration register, RXONOFF.
Bit Name
Reset Value
Access
Bit 7
BANKA
0
R/W
Bit 6
RON3
1
R/W
Bit 5
Bit 4
Bit 3
Bit 2
RON2
RON1
RON0
ROFF2
1
1
1
1
R/W
R/W
R/W
R/W
Figure 29. RXONOFF Register
Bit 1
ROFF1
1
R/W
Bit 0
ROFF0
1
R/W
Addr
$09
MC33596 Data Sheet, Rev. 4
Freescale Semiconductor
39