MC33596_10 Datasheet, PDF(27/70 Page) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

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MC33596_10 Datasheet, PDF (27/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

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Configuration Mode

NOTE

A low level applied to CONFB and a high level to STROBE do not affect

the configuration register contents.

STROBE 0

SEB 1

CONFB 1

SCLK 1

(Input) 0

MOSI 1

(Input) 0

MISO 1

(Output) 0

STROBE 0

SEB 1

CONFB 1

SCLK 1

(Input) 0

MOSI 1

(Input) 0

MISO 1

(Output) 0

N1 N0 A4 A3 A2 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

Figure 19. Write Operation in Configuration Mode (N[1:0] = 01)

N1 N0 A4 A3 A2 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Figure 20. Read Operation in Configuration Mode (N[1:0] = 01)

13.2 State Machine

The configuration mode is selected by the microcontroller unit (MCU) to write to the internal registers (to

configure the system) or to read them. In this mode, the SPI is a slave. The analog parts (receiver) remain

in the state (on, off) they were in prior to entering configuration mode, until a new configuration changes

them. In configuration mode, data can not be received. As long as a low level is applied to CONFB, the

circuit stays in State 1, the only state in this mode.

Figure 21 describe the valid sequence for enabling a correct transition from Standby/LVD mode to

configuration mode. SPI startup time corresponds to the addition of the crystal oscillator lock time

(parameter 5.10) and the PLL lock time (parameter 5.9).

MC33596 Data Sheet, Rev. 4

Freescale Semiconductor

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