MC33596_10 Datasheet, PDF (40/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Register Description
BANKA defines the register bank selected, as described in Section 15, “Configuration Switching.”
RON[3:0] (Receiver On) define the receiver on time (after crystal oscillator startup) as described in
Section 11.3, “Receiver On/Off Control.”
Table 16. Receiver On Time Definition
RON[3:0]
0000
0001
0010
...
1111
Receiver On Time: N x 512 x T_digclk
Forbidden value
1
2
...
15
ROFF[2:0] (Receiver Off) define the receiver off time as described in Section 11.3, “Receiver On/Off
Control.”
Table 17. Receiver Off Time Definition
ROFF[2:0]
000
001
010
011
100
101
110
111
Receiver Off Time: N x T_Strobe
1
2
4
8
12
16
32
63
16.5 ID and Header Registers
Figure 30 defines the ID register, ID.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit Name
IDL1
IDL0
ID5
ID4
ID3
ID2
ID1
Reset Value
1
1
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Figure 30. ID Register
IDL[1:0] (Identifier Length) sets the length of the identifier, as shown on Table 18.
Bit 0
ID0
0
R/W
Addr
$0A
MC33596 Data Sheet, Rev. 4
40
Freescale Semiconductor